806F4 MCC - i have never seen too.S1, why have I never seen them before, R0 date is the same as E0 (2021'52), maybe Intel skipped this step?
but E1 is missing too. but its all fantasy, nothing stored anywhere.
806F4 MCC - i have never seen too.S1, why have I never seen them before, R0 date is the same as E0 (2021'52), maybe Intel skipped this step?
they are not comparable, completely different chop/stage.R0 date is the same as E0 (2021'52), maybe Intel skipped this step?
806F4/87 MCC S1 is fixed: share MCU with other 806F4: but if the microcode doesn't fit, the cpuid/stepping must be moved.R0 date is the same as E0 (2021'52), maybe Intel skipped this step?
PL2 is just for a fraction of a second.This is magic, but 324W PL2 is still too low (now 3.3GHz)
3.5Ghzcheck in HWinfo what max. all core AVX2 clock this Q071 can. this is the limit.
HWinfo package power ?
IA/SSE is 35x, AVX2 should 33x then3.5Ghz
The power still be limit at 300W, but it is already very good now.
sure, i will clear up all. i think this quickinfo bubble is buggy.
insert as code ? (just the first sections)Still unable to successfully upload the HTML file here
Full core 3.5 in CPU-Z AVX2
View attachment 36115
the most important question ! how much ?3.5Ghz
The power still be limit at 300W, but it is already very good now.
REAL! but there are still some power limit (around 300w), even CPU-Z also has some core frequency downreal 35x ? strange. cbr23 cannot exploit it...
insert as code ? (just the first sections)
HWiNFO64 v7.66-5271
Creation Time 16.04.2024 20:24
Content:
CPU
Motherboard
Memory
Drives
Network
DESKTOP-FJTC8J7
[Current Computer]
Computer Name: DESKTOP-FJTC8J7
Computer Brand Name: Giga Computing MS03-CE0-000
[Operating System]
Operating System: Microsoft Windows 10 Professional (x64) Build 19045.4291 (22H2)
UEFI Boot: Present
Secure Boot: Disabled
Hypervisor-protected Code Integrity (HVCI): Disabled
Current User Name: Windows
Central Processor(s)
[CPU Unit Count]
Number Of Processor Packages (Physical): 1
Number Of Processor Cores: 32
Number Of Logical Processors: 64
Intel Xeon -2700
[General Information]
Processor Name: Intel Xeon -2700
Original Processor Frequency: 2700.0 MHz
Original Processor Frequency [MHz]: 2700
CPU ID: 000806F3
CPU Brand Name: Genuine Intel(R) CPU 0000%@
CPU Vendor: GenuineIntel
CPU Stepping: R0
CPU Code Name: Sapphire Rapids-SP
CPU Technology: Intel 7
CPU QDF: Q071 (ES1)
CPU Thermal Design Power (TDP): 270.0 W
CPU Power Limits (Max): Power = 624.00 W, Time = 32.00 sec
CPU Power Limit 1 (Long Duration)/Processor Base Power (PBP): Power = 270.00 W, Time = 448.00 sec [Unlocked]
CPU Power Limit 2 (Short Duration)/Maximum Turbo Power (MTP): Power = 324.00 W, Time = 11.72 ms [Unlocked]
CPU Power Limit 4 (PL4): 485.0 W
Configurable TDP Level 1 (Down): 270.00 W (0.00 W - 824.00 W), 0 MHz
Configurable TDP Level 2 (Up): 270.00 W (0.00 W - 824.00 W), 0 MHz
Current Configurable TDP Level: Nominal (Legacy) [Unlocked]
CPU Max. Junction Temperature (Tj,max): 100 °C
CPU Type: Engineering Sample
CPU Platform: Socket E (LGA4677)
Microcode Update Revision: D0004B1
Favored Cores List: 21, 2, 22, 24, 25, 30, 31, 32, 1, 3, 5, 12, 17, 18, 26, 27, 28, 29, 4, 6, 8, 9, 10, 11, 13, 14, 15, 16, 23, 7, 19, 20
Number of CPU Cores: 32
Number of Logical CPUs: 64
[Operating Points]
CPU LFM (Minimum): 800.0 MHz = 8 x 100.0 MHz
CPU HFM (Base): 2700.0 MHz = 27 x 100.0 MHz
CPU Turbo Max: 3900.0 MHz = 39 x 100.0 MHz [Unlocked]
Turbo Ratio Limits - IA/SSE, Fused: 39x (1-16c), 38x (17-24c), 37x (25-26c), 36x (27-28c), 35x (29-32c)
Turbo Ratio Limits - IA/SSE, Resolved: 39x (1-16c), 38x (17-24c), 37x (25-26c), 36x (27-28c), 35x (29-32c)
Turbo Ratio Limits - AVX2, Fused: 39x (1-16c), 38x (17-24c), 37x (25-26c), 36x (27-28c), 35x (29-32c)
Turbo Ratio Limits - AVX2, Resolved: 39x (1-16c), 38x (17-24c), 37x (25-26c), 36x (27-28c), 35x (29-32c)
Turbo Ratio Limits - AVX-512, Fused: 39x (1-16c), 38x (17-20c), 36x (21-24c), 35x (25-26c), 34x (27-28c), 33x (29-32c)
Turbo Ratio Limits - AVX-512, Resolved: 39x (1-16c), 38x (17-20c), 36x (21-24c), 35x (25-26c), 34x (27-28c), 33x (29-32c)
Turbo Ratio Limits - TMUL, Fused: 39x (1-16c), 35x (17-20c), 33x (21-24c), 31x (25-26c), 30x (27-28c), 29x (29-32c)
Turbo Ratio Limits - TMUL, Resolved: 39x (1-16c), 35x (17-20c), 33x (21-24c), 31x (25-26c), 30x (27-28c), 29x (29-32c)
Maximum Per-core Ratio Limits (Fused): 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, 39
Maximum Per-core Ratio Limits (Current): 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, 39
CPU Current: 2700.0 MHz = 27 x 100.0 MHz @ 0.8058 V
LLC/Ring Maximum: 2500.0 MHz = 25.00 x 100.0 MHz
LLC/Ring Current: 2500.0 MHz = 25.00 x 100.0 MHz @ 1.0076 V
CPU Bus Type: Intel Ultra Path Interconnect (UPI) v1.0
Number of UPI Links per CPU: 3
[IA Overclocking]
Voltage Offset: Supported
Voltage Override: Supported
Ratio Overclocking: Not Supported
Fused Ratio Limit: 39x
OC Ratio Limit: N/A
Voltage Mode: Interpolative
Voltage Offset: 0 mV
[CLR (Mesh) Overclocking]
Voltage Offset: Supported
Voltage Override: Supported
Ratio Overclocking: Not Supported
Fused Ratio Limit: 25x
OC Ratio Limit: N/A
Voltage Mode: Interpolative
Voltage Offset: 0 mV
[MC/DDR Overclocking]
Voltage Offset: Not Supported
Voltage Override: Supported
Ratio Overclocking: Not Supported
Fused Ratio Limit: N/A
OC Ratio Limit: N/A
Voltage Mode: Interpolative
Voltage Offset: 0 mV
[PCIe Overclocking]
Voltage Offset: Not Supported
Voltage Override: Supported
Ratio Overclocking: Not Supported
Fused Ratio Limit: N/A
OC Ratio Limit: N/A
Voltage Mode: Interpolative
Voltage Offset: 0 mV
[VCC_CFN Overclocking]
Voltage Offset: Not Supported
Voltage Override: Supported
Ratio Overclocking: Not Supported
Fused Ratio Limit: N/A
OC Ratio Limit: N/A
Voltage Mode: Interpolative
Voltage Offset: 0 mV
[VCC_DDRA Overclocking]
Voltage Offset: Not Supported
Voltage Override: Supported
Ratio Overclocking: Not Supported
Fused Ratio Limit: N/A
OC Ratio Limit: N/A
Voltage Mode: Interpolative
Voltage Offset: 0 mV
[Cache and TLB]
L1 Cache: Instruction: 32 x 32 KBytes, Data: 32 x 48 KBytes
L2 Cache: Integrated: 32 x 2 MBytes
L3 Cache: 60 MBytes
Instruction TLB: 2MB/4MB Pages, 8-way set associative, 4 sets
Unified TLB: 4KB/2MB/4MB Pages, 8-way set associative, 128 sets
what do you see with normal CPU-Z bench all 3500mhz package power ?REAL! but there are still some power limit (around 300w), even CPU-Z also has some core frequency down
thanks. afaik SPR is better supported by CBR24
0 to 0.4 second, no effectextend PL2 Time window to max. ???
it's not a supermicro/tyan or ASRock, so why notView attachment 36117
MS73-HB + D0 settings are working well with the latest BIOS R05 and latest firmware 13.05.09.