no trick, DL every BIOS you see and keep.
and in every BIOS package is a RelNotes.pdf
ES Xeon Discussion
- Thread starter britinpdx
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and in every BIOS package is a RelNotes.pdf
36core*2.7Ghz(300w PL1)=47K
48core*???Ghz(300w PL1)=50K?
8461v seem be limit by PL1.
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My score on 8641v on W11 and Supermicro board was closer to 58k. That’s one of the screenshots I still have.
i can only compare with my gigabyte MS33.AR0. limit is TDP. maybe single rank memory is limiting mem.bandw.
Here maybe one of the world first screenshots of 8490H Q03J E0 on Asus w790E SAGE.
After it was not working on the Asrock board
, we tried this to make sure i didnt get a repainted D0.
And surprizingly enough it booted after the QYFS, even without cmos reset, kept all bios settings.
It requires the same bios mods as QYFS, for windows to boot.
Score is out of the box, on high performance profile. no BCLK only Mem at 6000MT but it doest not show in most windows software except in the taskmgr.
After it was not working on the Asrock board
, we tried this to make sure i didnt get a repainted D0. And surprizingly enough it booted after the QYFS, even without cmos reset, kept all bios settings.
It requires the same bios mods as QYFS, for windows to boot.
Score is out of the box, on high performance profile. no BCLK only Mem at 6000MT but it doest not show in most windows software except in the taskmgr.
Q071 on MS03-CE0
work good so far, very high frequency, similar to 8462Y+, memory latency is lower than XCC CPU(88ns), unfortunately the 270W TDP limited performance.
Gigabyte server MB are still a little crappy, ASUS W790 is probably the best (if it works).
work good so far, very high frequency, similar to 8462Y+, memory latency is lower than XCC CPU(88ns), unfortunately the 270W TDP limited performance.
Gigabyte server MB are still a little crappy, ASUS W790 is probably the best (if it works).
its not go up to 3500mhz all core ?
tried PL1 time window with max. seconds ?
( RAPL config )
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CPU-Z = 3450Mhz avg
R23 = 3150Mhz avg
Prime95 smallfft= 2600Mhz
CPU package power never >270W
where? i never tried to change these.
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Question for dual cpu 4677 with E0 stepping (hopefully 8490H Q03J).
Are all Gigabyte MS73-HBx boards using the same bios? And are the current latest available bios
(R3 Mar 12, 2024, and R5, April 12, 2024) still supporting D0 and E0 Steppings?
Is there any one with a board other than HB1? That tried it?
Would it be a big risk to take HB0 or HB2 instead of HB1, concerning ES compatibility?
The difference just seems 2 faster 10GB lan ports. But maybe i am overlooking something.
Are all Gigabyte MS73-HBx boards using the same bios? And are the current latest available bios
(R3 Mar 12, 2024, and R5, April 12, 2024) still supporting D0 and E0 Steppings?
Is there any one with a board other than HB1? That tried it?
Would it be a big risk to take HB0 or HB2 instead of HB1, concerning ES compatibility?
The difference just seems 2 faster 10GB lan ports. But maybe i am overlooking something.
Sorry just curious. Is Q071 D0 Stepping or E0? How is it possible to see R0 instead of S0 in HWinfo?
And why is your HWinfo showing the Q code and mine not? Paid version?
--
R0 = MCC
806F0/97, "A"
806F1/10, "HBM A"
806F1/87, "B"
806F2/87, "C"
806F3/87, "D0/R0"
806F4/87, "E0/S1"
806F5/87, "E2/B1"
806F5/10, "HBM"
806F6/87, "E3/S2"
806F7/87, "E4/S2"
806F8/87, "E5/S3"
806F8/10, "HBM"
the author(martin) can not know all QDF/Sspec, they are not stored in the CPU - some has to be reported by the users.
D0 = XCC
R0 = MCC
806F0/97, "A"
806F1/10, "HBM A"
806F1/87, "B"
806F2/87, "C"
806F3/87, "D0/R0"
806F4/87, "E0/S1"
806F5/87, "E2/B1"
806F5/10, "HBM"
806F6/87, "E3/S2"
806F7/87, "E4/S2"
806F8/87, "E5/S3"
806F8/10, "HBM"
have you latest HWinfo ?
the author(martin) can not know all QDF/Sspec, they are not stored in the CPU - some has to be reported by the users.
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PL1 Time windows is the Time PL1 can be exceeded.
Adv.power mangement.
Socket RAPL config.
you may use R01BIOS (and up) if you don't see.
S1, why have I never seen them before, R0 date is the same as E0 (2021'52), maybe Intel skipped this step?
806F4 MCC - i have never seen too.
but E1 is missing too. but its all fantasy, nothing stored anywhere.
they are not comparable, completely different chop/stage.
E0 = XCC = 4 tiles
R0 = MCC = monolithic
806F4/87 MCC S1 is fixed: share MCU with other 806F4: but if the microcode doesn't fit, the cpuid/stepping must be moved.
PL2 is just for a fraction of a second.
check in HWinfo what max. all core AVX2 clock this Q071 can. this is the limit.
HWinfo package power ?