Looks like the video card is in it's own group? That is a good sign if it is.
They are related, but no, we still don't know how IOMMU Groups works in AM4.
The thing is that isolation works from the PCIe Root Complex going down. If there is a part of the fabric that does NOT support ACS, everything in the tree hierarchy (That you see with lspci -t) below that specific PCIe Bridge, gets into the same IOMMU Group. If the PCI Bridge supports ACS, it will be in an independent IOMMU Group than the Device that is inmediately below it.
I took the time to try to despiece the lspci data that Patrick provided. The hierarchy looks rather orderly after you get used to it. The topology looks rather good for basic IOMMU Grouping, assuming that there aren't other surprises.
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I'm curious about what is the function of the Device 1452. These are categorized as Host Bridges, but they are mostly paired with a PCI Bridge as a Multifunction of them. I suppose that these Host Bridges are configurable, and shapes some things of the PCIe fabric like PCIe Lanes bifurcation, or something like that. Some PCI Bridges may not even be created if the PCIe Slot goes unused (Happens with bifurcation in consumer Intel platforms, too).
00:01.0 / 00:01.3 - 4 PCIe Lanes for Processor-to-Chipset
00:02.0 / 00:02.1? - Probably the 2-4 PCIe Lanes that are shared with the other Host Bridge that provides the Processor SATA Controller, as they had 3 possible configurations.
00:03.0 / 00:03.1 - Processor main 16 PCIe Lanes
00:04.0 / 00:04.1 - Probably bifurcates 8 PCIe Lanes from the previous in X370 if second PCIe Slot is populated
00:07.0 / 00:07.1 - Mostly for the Processor USB Controller
00:08.0 / 00:08.1 - Mostly for the Processor SATA Controller
I suppose that each of these should be in their exclusive IOMMU Groups at the bare minimum, assuming that the Processor supports PCIe ACS.
I also found this:
The New Citavia Blog: Some AMD Zen leaks (ES clocks, PCI info, Rambus DDR PHY, Roadmaps) [UPDATED]
The last 8 Devices at 00:18.x got a name. These are akin the bucketload of control Devices that LGA 2011 Processors have.
For some reason, the Phoronix lspci output (Which didn't go for full -vvv details or the tree) based on their MSI X370 XPOWER GAMING TITANIUM Motherboard includes a visible IOMMU Device at 00:00.2
Could that be because AMD-Vi/IOMMU wasn't enabled in Firmware?
OpenBenchmarking.org - Ryzen 7 1800X - lspci
Sadly, all Devices that has FLR announces it as FLReset- which should mean FLR is unsupported
Finally, for Passthrough purposes you REALLY NEED X370, just for the bifurcation to 8x/8x, because as I stated several times, it isn't as expansive as HEDT, and the Chipset PCIe 2.0 Lanes sucks. But looks better than LGA 1151.
Thanks a lot Patrick. So far, is rather good.