Fair enough. Do you have any link for the amount of clock sources for eg. the N100/N305 or do they depend on the motherboard, too? Tbh I looked for both CPU and SSDs regarding that topic and found basically nothing aside from this Forum.
It is usually whatever the platform reference design has. With Intel, the issue is that they really want to segment the market so for the mobile and ULV SKUs they tend to have a CPU/Chipset or SoC design that has some really annoying limits (like the RAM channels, PCIe root complex options, lanes etc.).
There are some block diagrams with enough details, but usually a sign of trouble is having more slots than is 'normal' on a board. In some cases there will be a PCH doing some PCIe switching, or a dedicated PCIe switch, and in those scenarios the whole bus and endpoint configuration (including sideband and clock setup) is going to depend on those chips rather than the CPU.
You'll also sometimes (not on small SBCs) see chips like
9FGL6251 - Intelligent PCIe Clock Buffer/Generator for nVME with configurations like
Separate Reference Clock on PCIe NVMe SSD - Forum - Timing Products - Renesas Engineering Community or there will be some exotic things like
https://www.sanblaze.com/_files/ugd/9865d6_3b9bcfb6c6b34885a41d31a8380ce15b.pdf
Either way, some easy way to see what the platform "should" do is just in the Intel documentation.
Edit: like this one for Alder Lake:
PCI Express* Port Support Feature Details - 001 - ID:759603 | Intel® Processor and Intel® Core™ i3 N-Series (for some reason Google has a German version but not an English one?) you can see that the total number of lanes doesn't mean the root complex can actually handle that many individual lanes. Note number 4 is especially important, they note their PCIe design doesn't go beyond 1 storage device. But their wording shows that they didn't actively block it, they just didn't design or test for it. If there is some resource exhaustion (i.e. no more clock configurable) you might get some sort of race condition.
PCIe note 9 on that page informs us a bit more about this:
The PCH PCIe* Root Ports can be configured to map to any of the SRCCLKREQ# PCIe* clock request signals and the CLKOUT_PCIE_P/N PCIe* differential clock signal pairs.
Say you have 2 storage devices and only one of them needs some extra stuff from the root port. If the first drive to get init needs it (and gets it), the second one will also work. But if the second one gets init first, takes up the resource (i.e. the clock) then the second one will never init since it also needed that clock but the root complex already gave it away. This isn't exactly how it works, but it is the simplest way I can explain it at the moment.
If you have 9 lanes but only 4 root ports (or something like that) you can split them up as much as you like, but your root port isn't going to be very happy about 2 devices on the same port wanting the same clock to do different things.
On the other hand, the Chinese designs tend to expose all interfaces so you can make that choice yourself, with the downside that as a user you're now exposed to Intel x86 you usually don't have to think about (boards from MiTAC, Asus, Gigabyte etc. simply don't give you ports that do such less-than-obvious things). But with the introduction of mSATA slots, some boards have had notes printed on them where using the mSATA slot means one of the classic SATA ports would be disabled. What is great its that with the non-standard configurations you can do interesting things like have 4 network controllers, 2 x1 M.2 slots, some SATA and some USB. It does however mean that suddenly not all ports that should behave the same will actually behave the same. But it's very functional and very cheap otherwise. And with NVMe SSDs getting most of the things they need on-board anyway (not entirely sure how that would work, perhaps PCIe clock recovery? IDK) this means you can get away with some pretty crazy setups.
Anyway, just because this is usually the sort of thing that causes weird stuff to happen on SBCs doesn't mean it is always the reason. But it is more likely than with a full price retail board you'd find for twice the price.