Some notes:
The CPU Zen dies has 32 PCIe Lanes, not 24. AM4 doesn't expose 8 lanes from the SERDES Controller (For PCIe, SATA or 10G NIC), and always wastes 4 for the Chipset, which is the main reason why I consider Embedded Ryzen/EPYC to be superior (Note that Embedded Ryzen is a Raven Ridge APU and it is missing 8 PCIe Lanes from the pure PCIe Controller, but those are missing in AM4 too. Is 32 or 24 vs 24 or 16 on CPU and APU, respectively). Also, the embedded Zens DOES expose the 10G NICs, which takes two lanes each.
Zen also can bifurcate each 16 lanes controller to up to 16 1x, but I'm not sure if AM4 Ryzens can do that. You could theorically have 8x/4x/1x/1x/1x/1x if you want to.
Intel consumer CPUs can do 8x/4x/4x. Note that for PCI Passthrough scenarios they require hacks since the Processor PCIe Controller does NOT support PCIe ACS, whereas AMD supports it.
While Intel has much better Chipset connectivity, a single high end NVMe drive can saturate DMI. Ryzen can have it hooked directly to it, albeit chances are that you are using the Chipset in some way (Moving NVMe SSD data to the Chipset NIC?). Actually, a full 32 lanes Embedded EPYC should be able to pull 16x or 8x/8x, 2 10G NICs, 2 NVMe and 4 SATAs with no multiplexing. A serious I/O beast.