imagen a board with 8 UDIMMs per channel.
You are super close
E7 v2/v3/v4 support 24 DIMMs per CPU.
so it is "6 DIMMs" per CPU channel
or "3 DIMMs" per Jordan Creek mem buffer chip channel
There's no point of using DDR4 clocked at lower Hz than 2133MHz, unless you are going for capacity.
Not possible here :/ (possible on E5 v2 even on DDR3 -1680v2 also possible with E5 v3, I think up to 2600 or slightly more when overclocked - 1660v3/1680v3).
It only applies in a very limited fashion to this situation, because E7 v4 use external memory buffers (e.g. Jordan Creek)
Exactly, I spend some time to tweak it, and it's different than any other Xeons.
How it works and why 2400MHz is not possible:
E7 v2/v3/v4 chips has 4 memory channels connected to the memory buffer - Jordan Creek or Jordan Creek 2.
E7 v2 has 4 lanes of SMI working at 2666MHz or 1600MHz
E7 v3/v4 has 4 lanes of SMI2 working at 3200MHz or 1866MHz (or 2666/1600MHz when connected to older Jordan Creek).
each Jordan Creek chip have 2 mem channels and can work at:
1333MHz (2666MHz to the CPU) or in a single channel mode 1600MHz (1600MHz to the CPU)
Jordan Creek 2: 1600MHz or 1866MHz.
So fastest possible configuration for v3/v4 is:
E7 v4
*(SMI2 ch1)Jordan Creek @ 3200MHz
#(DDR ch1)DDR3 @ 1600MHz
#(DDR ch2)DDR3 @ 1600MHz
*(SMI2 ch2)Jordan Creek @ 3200MHz
#(DDR ch3)DDR3 @ 1600MHz
#(DDR ch4)DDR3 @ 1600MHz
*(SMI2 ch3)Jordan Creek @ 3200MHz
#(DDR ch5)DDR3 @ 1600MHz
#(DDR ch6)DDR3 @ 1600MHz
*(SMI2 ch4)Jordan Creek @ 3200MHz
#(DDR ch7)DDR3 @ 1600MHz
#(DDR ch8)DDR3 @ 1600MHz
it is much faster than:
E7 v4
*(SMI2 ch1)Jordan Creek @ 1866MHz
#(DDR ch1)DDR3 @ 1866MHz
*(SMI2 ch2)Jordan Creek @ 1866MHz
#(DDR ch3)DDR3 @ 1866MHz
*(SMI2 ch3)Jordan Creek @ 1866MHz
#(DDR ch5)DDR3 @ 1866MHz
*(SMI2 ch4)Jordan Creek @ 1866MHz
#(DDR ch7)DDR3 @ 1866MHz
SMI is working at 3200MHz, in time when DDR4 was ~2400MHz, so it's similar to 9000MHz today
I was not able to find any mode or solution faster than 1866MHz and this 1866MHz was not optimal, and much slower than 2x1600MHz.