8272CL means Cascade Lake Xeon (x2xx) and those have 1 TiB minimum. "C"-suffix is undocumented, possibly "custom(er|ized)", "L" suggests 4.5 TiB. "M" would be 2 TiB. That being said, you will need a huge board with 12-16 DIMM slots per CPU. One CPU has 2 memory controllers with 3 channels each, so best speed would be 6 DIMMs only, and only 32 GB RDIMMs at that. There is a benchmark somewhere that compared 16/32/64 RDIMMs, 32 GB came out in 1st place. If you up the game to 12x 128 GB LRDIMM per CPU, you will get to 1.5 TiB of RAM per CPU or 3 TiB total in a dual socket system. For Cascade Lake, that will be pretty much it. Also because 19" breadth limits how many memory slots can be crammed into the space next to the CPU sockets.
For Ice Lake Xeons (x3xx) there are 8 RAM channels for a possible total mainstream 2P system with 32 slots, 16 per CPU, and 32x128 LRDIMMs for 4 TiB in total.
Anything beyond FCLGA4189 with its whopping 4189 pads is running into mechanical stability and cooling issues in a 2U case. I suspect there will be a transit like with PATA to SATA or Ultra-320 SCSI 20 years ago to 4-lane twinax SAS.
That said you'd need a board which manufacturer has tested with that much of RAM. Don't build anything with RAM parts that aren't on the QVL.