Reduce Epyc idle power consumption?

Discussion in 'Processors and Motherboards' started by elag, Nov 15, 2019.

  1. elag

    elag Member

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    I have a Epyc 7302 in a supermicro H11SSL-i motherboard: works great. In the machine I have 2 6TB spinners and a handfull of SSDs (2*SATA, 2 NVME + 1 Optane 800p) and a single port Mellanox ConnectX-3.
    (almost) idle power consumption for this system is just over 100W. Are there any settings in the bios that anybody knows of that will reduce the idle power consumption?

    I guess that reducing power consumption may have performance impact, but I am not too worried about that.
     
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  2. am45931472

    am45931472 Member

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    I would think idle power consumption of a cpu like that alone would at least be ~50w. 2 spinners plus 3 more nvme disks and a 10/40gb nic, I can see how that gets around 100w. You could do power down on those disks when they are not in use however I know that alot of people dont like to do that because of the stress that it puts on them which could cause premature failure. instead they just chose to keep those disks spinning. nvme disks consume more power than sata, but of course their performance is worth it.

    if you were crazy you could disable the ipmi bmc, save maybe 5w. could also swap the CX3 for something newer.

    Also fans consume alot more power than most people realize.
     
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  3. Evan

    Evan Well-Known Member

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    Epyc despite being a nice small new process is not that power efficient (it’s built to be big with high performance more than small and light on power like intel scalable silver), it’s not that bad for sure but that 100w doesn’t sound too far off the mark. As pointed out especially some NVMe disks can consume more than maybe expected.
     
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  4. am45931472

    am45931472 Member

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    Also too I think its just a fact of life the more cpu cores you are idling the more power you consume even at idle. I had thought i read somewhere its like 1.5-2w per core on epyc and on most chips. so a 8 core would only idle maybe 15w. a 16 core maybe 30. That there is no idling cpu0 at 2w and then cpu1-7 at 0w.
     
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  5. EffrafaxOfWug

    EffrafaxOfWug Radioactive Member

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    All of that IO - quad octa-channel memory and enough lanes for twenty villages - takes a lot of power to run. The individual cores themselves are very power efficient (better than Intel by my reckoning anyway) but all of the IO it's attached to as a platform is quite expensive.

    You can see the same thing echoed with the Ryzen 3000 chips; inside, they've got pretty much the same chiplets as the Epyc 7002 series (although Epyc has more of them) and the IO is highly limited. Run them on the PCIe 4.0 X570 chipset and idle power is a good 10-20W higher than running the same CPU on the PCIe 3.0 X470 chipset.
     
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    TXAG26 likes this.
  6. elag

    elag Member

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    Yeah, I realized this. In the Epyc Rome reviews Patrick specifies an idle consumption of around 90 - 100W with all sliders up to maximum performance. It would be interesting to see how much the io-die consumes. As one of the reviews suggested it could be most of the total idle consumption...

    I was hoping that there would be a way to turn off some of the goodies in the IO-die to reduce power consumption
     
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  7. TXAG26

    TXAG26 Member

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    Would running only 4 sticks of RAM (4 channels) cause the memory controller to power down the unused channels? Tell me more about the performance sliders - is this a setting in the bios? What does it control?
     
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  8. Quade

    Quade New Member

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    @TXAG26 This would be a huge performance hit which is not worth the trouble.
    @elag Have you tried to override power state voltage via ZenStates? Stability at idle could be questionable, although it's possible to shove off 10-20W by simply lowering it below VID. Be mindful to put it through some stability testing.
     
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  9. EffrafaxOfWug

    EffrafaxOfWug Radioactive Member

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    Is it still the case? Even with Naples, running quad-channel was ~5% slower than octa-channel, not what I'd call a huge performance hit;

    https://www.servethehome.com/amd-epyc-naples-memory-population-performance-impact-at-16-cores/

    ...and thanks to the IO die, the Zen2 chips should be much less sensitive to memory speeds than the previous gen (haven't seen any concrete figures on memory topology for Rome yet though).

    Back to the GP, I would hope that if the memory channels aren't populated then they'll be left "idling" and thus not sucking up large amounts of power, but there'll still be some drain from having them semi-active, ditto the PCI lanes.
     
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