Looking to gather a better understanding what occurs here at a low level. If a server has been set to high performance mode in the bios I would expect that turbo boost is then disabled as its dependency speedstep is disabled?
Intel speedstep/turbo boost
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How can a core enter turbo mode if all the other core's are already at normal max clock speed?
Depends on the BIOS implementation - there's no general consensus in what "high performance mode" means. Sometimes it means that the CPU will be locked at its highest nominally rated clockspeed regardless of system load, and sometimes it could mean the memory clock/latency settings are tweaked to certain preconfigured values. Turning off Turboboost altogether is usually considered a bad idea. That being said, it also depend on how you setup your workload and whatnot. If your code is contingent on, say, single core performance, then you could disable, say, 2 cores in an 8 core package and then run the other 6 cores on an extra 2 clock steppings and get a few extra percent of performance (it might be more since you are also freeing up the L1 cache and on-die crossbar for additional bandwidth)
That's not the scenario that I'm looking at. All cores are not all working at the same time even if EIST is disabled and the cores are showing the max clock. Showing max clock and working 100% at that clock are two different things. Disabling EIST has to do with performance tuning/latency, doesn't mean the cores are actually working.
If the machine has its P-States enabled (Speedstep) and the cpufreq governor is set to ondemand, then not every core is always running on the same high frequency (unless you artificially set it that way). Hell, there are advantages to not having all cores run at its highest clock speed in certain applications. For example, if you run a trading firm and bought a 10 core Xeon, and you are only running 4 strategies (one core per strategy), one core managing DMA from the Infiniband or 10/40GbE card and one assigned to the OS, you can disable/idle the other 4 cores and let the other cores run nearly permanently at 2 or 3 clock steppings above the max due to the higher thermal ceilings you just gave yourself. Theres also the benefit of having more bandwidth for the 6 (instead of 10) cores talk to the memory and whatnot.
I had never heard of a corelation with P-states and speedstep, I did not realize they were one in the same. We have p-states disabled.
Basically there are 2 things to be cognizant of - P-States and C-States.
P-States are your CPU frequency settings, and C-States are your "gating" features.
Basically, the deeper your C-States go, the more your CPU dies will go to sleep, and the longer it takes to recover (could be hundreds to thousands of clock cycles from C6E back to C0 observed on Avoton Atoms). At my past gig I tuned C-States on trading machines to not go anywhere beyond C1.
As for P-States, state changes used to be computationally kinda expensive (back in the days of the Pentium III or 4), but modern cores (like the Pentium-M and beyond) are much better at it, almost to the point where it is 10 clock cycles or less to throttle up fully.
If you disable P-States and leave C-States turned on, then that's just counter-productive.