AMD Epyc 7252 + ASRock ROMED6U-2L2T and RAM configuration.

[IrY100Fan]

Hi Everyone,

I put together a new home server consisting of an AMD Epyc 7252 processor and an ASRock ROMED6U-2L2T motherboard. My understanding is the Epyc 7252 has been optimized to run only four memory channels, thus I only bought four sticks of RAM. The ASRock manual states that when using only four DIMMs, populate slots C1, D1, G1 and H1. My question is, by following the manual have I placed the DIMMs in the optimal slots for this processor? (Don't know if ASRock took four-channel processors into consideration with the memory chart in the manual.) And also, if I find I need more memory in the future, is there and benefit/detriment to populating the two other memory channels or is it just better to upgrade only the four channels?

This is my first foray into server parts.

Thanks.
-Brian

 

[Patriot]

The io-die connects to the ram, because you only have 2 CCX chiplets, you are bandwidth constrained the limit is the CCX to io-die connection, not io-die to ram. You have 8 channels of ram still.


It shouldn't matter where you connect them, but it would be curious to see if stream benchmark does not line up with expected performance.

 

[IrY100Fan]

Hello Patriot,

Thank you for the information and reply.

If I am understanding what you are telling me...
All of the memory channels are connected to a single IO-die so it really doesn't matter which memory channels are used from a performance standpoint. The "optimized to 4 channels" is a function of the bandwidth limit between the processor cores themselves and the IO-die. Thus, following ASRock's guide is the correct configuration for having four DIMMs. I'm also assuming that if I want to add more memory in the future, I can just populate the unused two channels. I might not see a performance benefit but I also shouldn't see a decrease in performance either.

My problem was I misunderstood how the CPU worked internally. I initially thought that the two quad-core CCDs were connected to one IO-die which contained four memory channels and that the other four memory channels were on a separate die and thus would be slower because of the link between the two dies. Thank you educating me on the internals of this processor.

-Brian

 

[RolloZ170]

All of the memory channels are connected to a single IO-die so it really doesn't matter which memory channels are used from a performance standpoint.

no. 4 channels are more near the CCX. the other 4 are just some more latency away.
optimized for four channels means: "if your board has only 4 RAM Slots, take these processors"

 

[Patriot]

All the ram hangs off the IO die for rome and on. But there are only 2 core chiplets on yours thus limited bandwidth.
I don't know if anyone has done latency tests for ram slot locations. What Patrick sketched up was a concept model to explain the bandwidth limits in consumer io-die terms. We don't have any information from AMD on how the io-die is composed only that it is designed in a similar manner from the desktop io-die.

 

[IrY100Fan]

I'm guessing I'm only using a tiny portion of the capabilities of the system for my immediate needs, so latency probably isn't an issue for me. I just tend like things to be optimized as much as possible. But as a fun experiment, is there a benchmark utility that can be used to test performance/latency of memory? I wouldn't mind putting a little time into testing and swapping memory around to see how things are affected. (FYI, I run Ubuntu based Linux.)

 

[IrY100Fan]

In case anybody is interested, I did some benchmarking by populating different memory slots to see what, if any, performance impact may occur. Keep in mind these are synthetic benchmarks. I used Intel's Memory Latency Tester (v3.10), Phoronix Test Suite (v10.8.4) and AIDA64 Extreme (v6.88).

- Single DIMM: Channels A,C and D have the lowest latencies but bandwidth doesn't change no matter what slot you use.
- Dual DIMM: Memory bandwidth and latency are best when using any combination of channels A, C and D.
- Quad DIMM: Channels C, D, G and H give best bandwidth. Using any other channels decreases bandwidth by about 40%. Latency doesn't change much.
- Six DIMMs (All channels populated on this board): Memory bandwidth is lost by about 40% compared to 4-channel mode. Seems like moving to four larger capacity DIMMs is better then adding more modules.

So following the chart in the ASRock's manual does yield the best results in synthetic benchmarks. Does this hold true with real world usage...I don't know.

Just thought I'd share...