AMD Naples – Competition Re-Ignites as Zen Hits the Server Market

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eva2000

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The E5-1680v4 is a $2000 chip. I wonder if there will be a Naples equivalent workstation chip?

Part of the problem I see is Ryzen does not really compete apples to apples with Intel. Ryzen is a great chip, competes the HEDT i7's for performance but is gimped on the PCIe lanes like the mainstream chips.
yeah maybe some serious price cuts from intel on the E5-16xx range :D
 

Hank C

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Jun 16, 2014
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I would bet 4 of those CCX would be about the same as laptop 1 CCX in terms of TDP. If that's the case, we would see 140w for ultra performance one?
 

eva2000

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Wish I hadn't sold my shares in AMD when I did. Oh well. It is good that they're trying to make inroads into that high end server chip market so they can finally fill their coffers with cash.
yeah everyone except Intel is probably hoping AMD succeeds with AMD Zen platform - giving Intel some competition is always good for customers :D
 

Jaket

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Oh billy!
I hope this really is good! It's been so many years I still remember AMD telling us to buy Intel when we went to an event from them years ago.
Now the wait for those NDA's to end so we can get more details :)
 

Rain

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May 13, 2013
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Yes. Just wait until you see the 4 cpu version with no pcie lanes!
Pssshh, just throw PLX chips between the CPUs; it'll be fine.

Honestly though, I'd be surprised if AMD was only shooting for the dual-socket market. I wonder what they have up their sleeve for four socket (and above) systems.

Crazy hypothetical: In the HPC / Super Computer space, fast interconnects between systems are key. Infinity Fabric inter-chassis networking, perhaps? "Fabric" doesn't really make since for an interconnect between just two CPUs... "Infinity" suggests it's expandable... Maybe there is more to come?
 

Hank C

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I bet for "infinity fabric", that mean using PCIE switch for CPU interconnection for those HPC.
if those TDP scaling serve right, I would also bet it would be in the 2ghz range to 2.6ghz range that Intel is running as well.
I would also be interested to see if HP can implement this in their Moonshot lineup utilizing the "fabric".
 

Blinky 42

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I would not be surprised if the "infinity fabric" is just a block of high-speed serial io ports that can be reconfigured to speak several protocols so we can get the HyperTransport++ like mode when used as an interconnect, PCIe3.0 and some to-be-disclosed GPU interconnect. SoC and FPGAs have been doing it for years High Speed Serial

Having the raw per-port speed for PCIe-4 would have been nice to support high speed networking + enough lanes for decent NVMe.

Motherboards with high-spec FPGAs + 1 or 2 socket Naples for a hybrid ML/HPC/Networking box could be quite awesome as well if the FPGA can basically access main memory as a cache-coherent peer through one of the non-PCIe protocols. Probably what they will do with the server gpu cards they were teasing.
 
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RobertFontaine

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Dec 17, 2015
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Avx512 is great intel marketing and had some specific advantages for very specific use cases.

In the meantime Nvidia is pushing single precision floating point.

And windows Server had been announced for arm chips.

In my dual 2670 refurb world the idea of 128 threads, lots of pcie and ram at a yet to be announced price is very interesting. If only to push the junk market that my wallet lives in down.
 

ATS

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Mar 9, 2015
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Pssshh, just throw PLX chips between the CPUs; it'll be fine.

Honestly though, I'd be surprised if AMD was only shooting for the dual-socket market. I wonder what they have up their sleeve for four socket (and above) systems.

Crazy hypothetical: In the HPC / Super Computer space, fast interconnects between systems are key. Infinity Fabric inter-chassis networking, perhaps? "Fabric" doesn't really make since for an interconnect between just two CPUs... "Infinity" suggests it's expandable... Maybe there is more to come?
Fabric/Interconnection networks have been used for inter CPU connections for decades. And Infinity is marketing, nothing more, nothing less, just like QPI and HyperTransport. There is a world of difference between running intra-chassis and inter-chassis in both latency requirements and signal integrity issues.

It is likely that the dual socket is running effectively dual linked. For quad socket, you'll likely see 3 32 lane wide ports in a fully connected topology. Due to the randomization of traffic, dual socket actually puts a higher burden on the interconnection network between any given cpu than quad socket. Its the same reason that Intel DP designs are dual linked as well.