I've purchased quite a few Celestica D4040 and DX010 switches and wanted to share how they worked around the LPC bug described in Intel's AVR54 erratum.
Most of my switches are manufactured in 2017+ and one in 2016, so I'm not sure if older switches have a different layout. The 2016 switch's C2538 was replaced with a C0 stepping C2558 (SR3GX). All of my 40G D4040s and 100G DX010s use the same management board. I don't have any other model but my guess is these older switches that use the C2000s use the same management part.
The Atom heatsink needs to be removed. There is a tiny 130-ohm resistor soldered to right of the green jumper wire, then to the unused pad.
Most of my switches are manufactured in 2017+ and one in 2016, so I'm not sure if older switches have a different layout. The 2016 switch's C2538 was replaced with a C0 stepping C2558 (SR3GX). All of my 40G D4040s and 100G DX010s use the same management board. I don't have any other model but my guess is these older switches that use the C2000s use the same management part.
The Atom heatsink needs to be removed. There is a tiny 130-ohm resistor soldered to right of the green jumper wire, then to the unused pad.
