Zen3 or Rocketlake?

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111alan

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Mar 11, 2019
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I trust that Ian's findings are true to the current state of things.
However, there could be other issues with the release roms and scheduler that could be causing performance hits.
I would give intel a few weeks to sort things out before calling it DOA, that said... I am going to go tune my 5950x now.
It's theoretically impossible if you dig further in. For the 6 games I tested, none of them has a "data sharing" bound more than 2% on both my Xeon CLX-SP and my friend's 10900K, then when the difference of several nanoseconds go though GPU bound and reflected to FPS, the test result will be well within the margin of error. Simply check the non-K skus, they usually have lower ring freq(more ring latency) but the stock gaming results are all the same with respective K variants.

Even if these few nanoseconds does matter, there are still a lot of other things seem off there.
1. Although the scheduler is enlarged, the instruction latencies aren't reported to be increased in Sunny Cove when it's first released, and might be decreased in later revisions of this arch like Cypress Cove.
2. By testing the 14-core ES ICX I saw that it not only has 2 more channels than CLX but also with about 10ns latency decrease, people have also tested mobile version before with similar results, but they got the polar opposite result on the desktop end? The same goes to the cache.
3. Also most importantly, the reported power is at least 1/3 higher than what someone in our ICQ group reported. Here's a picture about 11700K at 5.2GHz running prime95 at 278W. If you roughly calculate its power consumption at 4.0GHz, it will be no more than 125W, which is same as 3700X running Cinebench R15(SSE-only) at the same 4.0GHz frequency.

And my 5800X is about the same power when running CBR15 SSE as their AVX2, while 9900K is about half of their 10700K value running the same Cinebench R15 as my 5800X? Both at stock.
5800X_CB_pwcap_3200C16.JPG9900K_CB_pwcap_3200C17.PNG

If no paid biased review was going on, I would guess that some components' performance or frequency could be affected by testing version firmware or possibly no-microcode or no-ME-update, for example, bugged memory bandwidth or low ring frequency. But it's not likely as I've never experienced this before even on CRBs, and it's Anand and AMD. The famous Stilt quit that forum 2 years ago just because the toxicity of AMD fans there, and since then I lost trust in them. Also they always bashes the common practices in the industry, like advertising “max IPC uplift over selected apps” here, but not when they review AMD stuffs.

It's just not uncommon nowadays that people brainlessly boast AMD and nerf Intel, making up stuff to back them up(for example, try comparing both Ryzen3000 and i9 9000's power consumption multiplier-to-multiplier you'll see something people don't tell you). And it even comes to personal harassment. Hired supporters targeted even the oldest players like Der8auer or known-good sites like Techpowerup, who has a second thought.

These are dark times for rationality, when people don't even dare to talk. Try to dive deeper into the reality by testing with advanced tools and more realistic workloads. Always profile the benchmarks' workload before using them. I actually bought or borrowed a lot of Xeon and EPYC2 parts in the past year and communicated with several industrial designers and DC planners to try to get the workload right, resulting in a quite large list of tests results, and they explained a lot of things about why people design those CPUs this way, and what those professionals are choosing and why they did that. I shared these with my friend a while ago, but still struggling about whether should I write a public review or not. Try it or not, we must remain ourselves and pursuit the truth.

Sorry for talking about "politics" too much, but something has to be said.
TIM图片20210308081913.pngCPU_instr_lat.pngstilt.png
 

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Syr

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For those interested, heres a video Ian (author of the linked review) did that discusses a bit more behind the scenes details about the AVX512 benchmark he used and some of the other nuances of the benchmarking done.
 

Patriot

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Apr 18, 2011
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It's theoretically impossible if you dig further in. For the 6 games I tested, none of them has a "data sharing" bound more than 2% on both my Xeon CLX-SP and my friend's 10900K, then when the difference of several nanoseconds go though GPU bound and reflected to FPS, the test result will be well within the margin of error. Simply check the non-K skus, they usually have lower ring freq(more ring latency) but the stock gaming results are all the same with respective K variants.

Even if these few nanoseconds does matter, there are still a lot of other things seem off there.
1. Although the scheduler is enlarged, the instruction latencies aren't reported to be increased in Sunny Cove when it's first released, and might be decreased in later revisions of this arch like Cypress Cove.
2. By testing the 14-core ES ICX I saw that it not only has 2 more channels than CLX but also with about 10ns latency decrease, people have also tested mobile version before with similar results, but they got the polar opposite result on the desktop end? The same goes to the cache.
3. Also most importantly, the reported power is at least 1/3 higher than what someone in our ICQ group reported. Here's a picture about 11700K at 5.2GHz running prime95 at 278W. If you roughly calculate its power consumption at 4.0GHz, it will be no more than 125W, which is same as 3700X running Cinebench R15(SSE-only) at the same 4.0GHz frequency.

And my 5800X is about the same power when running CBR15 SSE as their AVX2, while 9900K is about half of their 10700K value running the same Cinebench R15 as my 5800X? Both at stock.
View attachment 17826View attachment 17827

If no paid biased review was going on, I would guess that some components' performance or frequency could be affected by testing version firmware or possibly no-microcode or no-ME-update, for example, bugged memory bandwidth or low ring frequency. But it's not likely as I've never experienced this before even on CRBs, and it's Anand and AMD. The famous Stilt quit that forum 2 years ago just because the toxicity of AMD fans there, and since then I lost trust in them. Also they always bashes the common practices in the industry, like advertising “max IPC uplift over selected apps” here, but not when they review AMD stuffs.

It's just not uncommon nowadays that people brainlessly boast AMD and nerf Intel, making up stuff to back them up(for example, try comparing both Ryzen3000 and i9 9000's power consumption multiplier-to-multiplier you'll see something people don't tell you). And it even comes to personal harassment. Hired supporters targeted even the oldest players like Der8auer or known-good sites like Techpowerup, who has a second thought.

These are dark times for rationality, when people don't even dare to talk. Try to dive deeper into the reality by testing with advanced tools and more realistic workloads. Always profile the benchmarks' workload before using them. I actually bought or borrowed a lot of Xeon and EPYC2 parts in the past year and communicated with several industrial designers and DC planners to try to get the workload right, resulting in a quite large list of tests results, and they explained a lot of things about why people design those CPUs this way, and what those professionals are choosing and why they did that. I shared these with my friend a while ago, but still struggling about whether should I write a public review or not. Try it or not, we must remain ourselves and pursuit the truth.

Sorry for talking about "politics" too much, but something has to be said.
View attachment 17822View attachment 17823View attachment 17824
I would guess, as Intel's last few gens of chips have been very thermal and power constrained for clocks... that something is going on in that aspect, Turbo can change state at a rate that makes it hard to track actual clocks and high flux of clocks can cause high thread migrations.

As I said, I think Ian is clean and is reporting his findings, they may not be... what a retail chip looks like at launch with proper roms and drivers and scheduler updates.

He is also one of many annoyed at AVX512 being thrust upon a consumer chip, Linus Torvalds is another, I would imagine Ian's bias against FP IPC being stated when it does not align with the whole picture of actual end user performance is molded by Torvalds and a perfectly valid take.

Beyond that... I hate fanbois... for CES coverage Intel did wonderful press releases with settings that could be repeated by anyone... AMD did not.

AMDs Zen 2 launch marketing was horrid and terribly misleading on boost clocks, they replaced all of them and Zen 3 performs above advertised clocks. But Zen 3 APU launch was not properly documented for repeatability and comparison.

Intel hired Ryan Shrout renowned shill, and their latest marketing release for rocket lake used him and stank terribly.

Everyone has to be held accountable, they are all just companies that want your money.

Speaking of... those cinebench clocks on your 5800x, that's some hefty PBO +200
AMD chips get thirsty with heavy boosts unless you tune them, try CTR to find your voltage offsets for PBO, don't just crank the clocks and cry about power.
 
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111alan

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Mar 11, 2019
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Haerbing Institution of Technology
I would guess, as Intel's last few gens of chips have been very thermal and power constrained for clocks... that something is going on in that aspect, Turbo can change state at a rate that makes it hard to track actual clocks and high flux of clocks can cause high thread migrations.

As I said, I think Ian is clean and is reporting his findings, they may not be... what a retail chip looks like at launch with proper roms and drivers and scheduler updates.

He is also one of many annoyed at AVX512 being thrust upon a consumer chip, Linus Torvalds is another, I would imagine Ian's bias against FP IPC being stated when it does not align with the whole picture of actual end user performance is molded by Torvalds and a perfectly valid take.

Beyond that... I hate fanbois... for CES coverage Intel did wonderful press releases with settings that could be repeated by anyone... AMD did not.

AMDs Zen 2 launch marketing was horrid and terribly misleading on boost clocks, they replaced all of them and Zen 3 performs above advertised clocks. But Zen 3 APU launch was not properly documented for repeatability and comparison.

Intel hired Ryan Shrout renowned shill, and their latest marketing release for rocket lake used him and stank terribly.

Everyone has to be held accountable, they are all just companies that want your money.

Speaking of... those cinebench clocks on your 5800x, that's some hefty PBO +200
AMD chips get thirsty with heavy boosts unless you tune them, try CTR to find your voltage offsets for PBO, don't just crank the clocks and cry about power.
Yeah, usually more knowledge people have, less likely are they going to intentionally cheat. But in a certain environment the end product may not be, the article actually looks like being written by someone else, as not only there are a lot of problems, but also unpolished thoughts which doesn't look like what belong to a professional. To the end, there's fanboy making rumors because those who in charge did not stop them from doing so.

The AVX512 of this chip is somewhat weird. The power and performance results looks like this thing has 2 AVX512 units(one native and one made by combining two 256-bit FPs). But original Icelake/Tigerlake only have 1, which should not consume much more power or generates that much performance than AVX2(because the units activated are the same). If there are two then the frequency thrust is necessary and acceptable, given it literally has 2x performance per clk, consume twice the power on back end and switch between different frequencies very quickly. But if it's actually onethen everything is unexplainable, because the 1 AVX512 unit is made by combining two existing 256bit FP units together, the result of which is of the same throughput as if these FPs are separated, and the performance improvement is only due to the efficiency on software/compiler side, which is limited. I haven't found that extra large FP section in the die shot.

The 5800X on the screenshot is completely stock for the CPU, the only change in the BIOS is the memory frequency(changed to 3200, 3200AA timing by default). PBO is disabled, as I always consider PBO overclock, as it's officially declared and not always stable. The motherboard is ASUS C8H. I actually want to decrease the frequency multiplier-by-multiplier to make a frequency-power table but the there is a bug which locks the voltage to 1.1v whatever multiplier I set. I can manually set the voltage but it will be meaningless if I don't know what the default P-state voltages are for this chip. I don't know it's a problem from CPU side or motherboard side, but I'm still looking for a workaround.
 
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Patriot

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Those are high all core clocks for no pbo, but it is R15 not R20 w/avx... most reviews have it lower for all core load.
I am guessing your board is giving a bit extra hence the higher power usage.

You are running 100-125mhz more all core.


Hitting... PBO clocks. I think you have pbo enabled even if its toggled off.
Or whatever agesa you are on is boosting more aggressively than it should be for non-pbo.

These things sip at stock but PBO guzzles if you dont tune it.
 

111alan

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Mar 11, 2019
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Haerbing Institution of Technology
Those are high all core clocks for no pbo, but it is R15 not R20 w/avx... most reviews have it lower for all core load.
I am guessing your board is giving a bit extra hence the higher power usage.

You are running 100-125mhz more all core.


Hitting... PBO clocks. I think you have pbo enabled even if its toggled off.
Or whatever agesa you are on is boosting more aggressively than it should be for non-pbo.

These things sip at stock but PBO guzzles if you dont tune it.
The frequency seems to be similiar around 4.55GHz. You should look at the "power reporting"(number in red). Some motherboard tend to underreport the package power.
Explaining the AMD Ryzen "Power Reporting Deviation" -metric in HWiNFO | HWiNFO Forum

BTW my BIOS is 3204 with Agesa 1.2.0.0.
 

Patriot

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Apr 18, 2011
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The frequency seems to be similiar around 4.55GHz. You should look at the "power reporting"(number in red). Some motherboard tend to underreport the package power.
Explaining the AMD Ryzen "Power Reporting Deviation" -metric in HWiNFO | HWiNFO Forum

BTW my BIOS is 3204 with Agesa 1.2.0.0.
I linked a pbo overclock that matched your clock. ... So yes the frequency matches a pbo overclock.
But perhaps your mobo is just overvolting for higher clocks per hwinfo thread.
 

zer0sum

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Mar 8, 2013
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Rocket Lake isn't even officially released yet, and we have Alder Lake details and a possible release late this year.

New socket though, which means all current cooling solutions won't fit :(

1616521658348.png

1616423942596.png
 
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Patrick

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Dec 21, 2010
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So we are under embargo for Rocket Lake-S still.

At the same time, Alder Lake is Sept/ Oct right now and is a huge upgrade, which is going to be the big factor putting Rocket in a strange position.

When we discuss that PCIe Gen4 is a short-lived standard at Intel, this is the desktop picture. Ice in April, followed by Sapphire in a year is on the data center side.
 
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