Hello,
Here's the first preliminary version of the "debug" tool. Basically manually setting the addresses and commands.
SMUDebugTool_v1.0.0.zip
The software is provided "as is" and using it is on entirely on your own responsibility!
Trying the test message (0x1) should be safe, but I can't guarantee it.
View attachment 12602
How To
The app provides several fields
- CMD Address (hexadecimal) - the base SMU address where the command is sent, or the message address (SMU_ADDR_MSG)
- RSP Address (hexadecimal) - the response is read from this address
- ARG Address (hexadecimal) - the address for the first argument. Second argument is calculated automatically
- Command ID (hexadecimal) - the desired command ID. It's pre-populated with 0x1, which is always a "Test message". If that doesn't return OK, then some of the addresses is incorrect.
- Argument 0 and Argument 1 (integer) - used for arguments when the command is of type "read". Most of the time you want to set just the Argument 0. Both arguments are used when e.g. you want to set the frequency of a specific CPU core/thread.
- Status strip at the bottom
The fields are populated with the default values of the detected CPU Core. Defaults button resets all the fields to the detected values.
Some examples (for Matisse/Rome/CastlePeak)
1. Enable Manual Overclock
Change command to 0x5A and hit Apply. Status should say "OK" and the CPU should be forced to base frequency.
2. Disable Manual Overclock
Change command to 0x5B and hit Apply. Status should say "OK" and the CPU should be back to default.
3. Set Overclock Frequency for all cores
Manual OC should be enabled first (step 1). Change command to 0x5C and Argument 0 to 4000 (or your frequency of choice). Hit Apply. Status should be OK and a dialog with the response should be the frequency in HEX.
I'm still trying to figure out per core overclock, perhaps we don't need the second argument at all. It seem I will need to set the argument to hexadecimal as well.
It is strange that Matisse has 2 different mailboxes and the command IDs are different, too.
first set of commands:
Code:
SMC_MSG_EnableOverclocking = 0x5A;
SMC_MSG_DisableOverclocking = 0x5B;
SMC_MSG_SetOverclockFreqAllCores = 0x5C;
SMC_MSG_SetOverclockFreqPerCore = 0x5D;
SMC_MSG_SetOverclockVid = 0x61;
SMC_MSG_SetPPTLimit = 0x53;
SMC_MSG_SetTDCLimit = 0x54;
SMC_MSG_SetEDCLimit = 0x55;
SMC_MSG_SetHTCLimit = 0x56;
SMC_MSG_GetPBOScalar = 0x6C;
SMC_MSG_SetPBOScalar = 0x6E;
SMC_MSG_GetTctlOffset = 0x70;
2nd set of commands (with addresses):
Code:
const UInt32 SMU_ADDR_MSG = 0x03B10530;
const UInt32 SMU_ADDR_RSP = 0x03B1057C;
const UInt32 SMU_ADDR_ARG0 = 0x03B109C4;
const UInt32 SMC_MSG_TestMessage = 0x1;
const UInt32 SMC_MSG_GetSmuVersion = 0x2;
const UInt32 SMC_MSG_EnableSmuFeatures = 0x3;
const UInt32 SMC_MSG_SetTjMax = 0x23;
const UInt32 SMC_MSG_EnableOverclocking = 0x24;
const UInt32 SMC_MSG_DisableOverclocking = 0x25;
const UInt32 SMC_MSG_SetOverclockFreqAllCores = 0x26;
const UInt32 SMC_MSG_SetOverclockFreqPerCore = 0x27;
const UInt32 SMC_MSG_SetOverclockVid = 0x28;
const UInt32 SMC_MSG_SetBoostLimitFrequency = 0x29;
const UInt32 SMC_MSG_SetBoostLimitFrequencyAllCores = 0x2B;
const UInt32 SMC_MSG_GetOverclockCap = 0x2C;
const UInt32 SMC_MSG_MessageCount = 0x2D;
PS: Think I've figured out how to set per core. The Asus tool first sets all core frequency to lowest one, then sends the other command for a single core. The first argument is
for CCX 1, Core 2 (for core # 6), frequency FA0 which in DEC is 4000. So we don't need the second argument.
Difference between SMU MSG and SMU RSP addresses seems to be 0x4C. So I could probably scan some range of addresses to find the start address. The offset of the ARG is different, though.