None of the forum categories seem quite right for this question. I decided to post it here, because it relates to the backplane supplied with a Supermicro chassis. Don't hesitate to move it.
I am in the process of assembling new internet servers that will be configured in redundant pairs. They will each have local SSD and HDD SATA storage. The OS's will be Ubuntu 14.04 server which supports both I[SUP]2[/SUP]C and SGPIO utilities. High-performance LXC Linux containers will be used instead of hypervisors. The motherboards are Supermicro X10 SLM+-LN4F which have both I[SUP]2[/SUP]C and SGPIO interfaces. The chassis are SC813MTQ-350CB which Supermicro describes as being "optimized" for those motherboards. Those chassis include BPN-SAS-815TQ backplanes that support both I[SUP]2[/SUP]C and SGPIO, but that are preconfigured to use I[SUP]2[/SUP]C by default, which is the basis of my question.
Other Supermicro backplanes are preconfigured to use SGPIO by default. Do any of you know why the backplane in this chassis "optimized" for that motherboard is pre-configured to use I[SUP]2[/SUP]C? I understand both I[SUP]2[/SUP]C and SGPIO at the electronic design level and have written interface code for both. My concern is with not knowing Supermicro's reason for their I[SUP]2[/SUP]C default. Is it to make the backplane compatible by default with other motherboards that don't support SGPIO or something else?
I am in the process of assembling new internet servers that will be configured in redundant pairs. They will each have local SSD and HDD SATA storage. The OS's will be Ubuntu 14.04 server which supports both I[SUP]2[/SUP]C and SGPIO utilities. High-performance LXC Linux containers will be used instead of hypervisors. The motherboards are Supermicro X10 SLM+-LN4F which have both I[SUP]2[/SUP]C and SGPIO interfaces. The chassis are SC813MTQ-350CB which Supermicro describes as being "optimized" for those motherboards. Those chassis include BPN-SAS-815TQ backplanes that support both I[SUP]2[/SUP]C and SGPIO, but that are preconfigured to use I[SUP]2[/SUP]C by default, which is the basis of my question.
Other Supermicro backplanes are preconfigured to use SGPIO by default. Do any of you know why the backplane in this chassis "optimized" for that motherboard is pre-configured to use I[SUP]2[/SUP]C? I understand both I[SUP]2[/SUP]C and SGPIO at the electronic design level and have written interface code for both. My concern is with not knowing Supermicro's reason for their I[SUP]2[/SUP]C default. Is it to make the backplane compatible by default with other motherboards that don't support SGPIO or something else?