Fujitsu TX1320 M3 - Cheap low power server (barebone)

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hmartin

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Sep 20, 2017
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Since you're targeting sub-4TB: 1.92/3.84TB SATA enterprise SSDs would be a better fit, IMHO. They're much lower power and will have better longevity than a mechanical drive.

They were a great buy 6-12 months ago. Not sure about pricing now though.

As for SAS experience, I have none to share. I only use SATA SSDs in this system.
 
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celemine1gig

Member
May 25, 2020
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If the presented options are
  • SAS HDDs and SAS controller
  • OR
  • SATA Enterprise SSDs and SATA controller
then keep in mind, that most Enterprise SSDs intentionally do NOT support powermanagement states. As a result, this will keep the SATA controller from reaching low power states, which in turn will keep the CPU from reaching low (probably anything lower than C2) package C-States.

So, in other words:
If power is a concern, then low power is really hard to reach, regardless if we are talking SAS HDDs, or Enterprise SATA SSDs. ;)
From my experience Enterprise grade SSDs with power management abilities are very hard to come by.
 
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slowlaris

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Aug 7, 2025
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If the presented options are
  • SAS HDDs and SAS controller
  • OR
  • SATA Enterprise SSDs and SATA controller
then keep in mind, that most Enterprise SSDs intentionally do NOT support powermanagement states. As a result, this will keep the SATA controller from reaching low power states, which in turn will keep the CPU from reaching low (probably anything lower than C2) package C-States.

So, in other words:
If power is a concern, then low power is really hard to reach, regardless if we are talking SAS HDDs, or Enterprise SATA SSDs. ;)
From my experience Enterprise grade SSDs with power management abilities are very hard to come by.
Thanks for the insight! I got tired of my worries and made a proper spreadsheet which helps me to decide between drive types. Sadly Enterprise SAS SSDs are very expensive (~ 300 EUR for 3.84 TB drive and consequently ~170 EUR for half capacity), so I decided to skip them. To put SAS HDDs pricing into a perspective, there's a seller in UK which sells 2TB Dell 7.2K RPM SAS HDDs for 28 EUR a piece :) that's pretty hard to beat.

So I took current prices, avg electricity price of 0.32 EUR/KWh and here are the results:

Screenshot 2025-12-06 at 00.22.14.png

Sum indicates total upfront drive cost + running them for a year. I've pulled drive power ratings from datasheets and drive labels. Btw CMR drive is also a used SAS drive, I was just wondering does it compare to others; it's also a 3.5" drive so I can't use it "natively".

Apart from it you can see that nothing beats Jet2Holiday that 28 EUR price - only SMR drives are approaching it in EUR / TB efficiency, but:
- They are SMR, so resilver would take days and going beyond mirror doesn't make sense;
- Even two SMRs have almost double upfront cost comparing to SAS, whereas with SAS same redundant 4 TB of capacity would cost me ~140 EUR (All prices are without S&H).

Here are my power calculations. I'm assuming that the drive is idle 80% of the time and is active 20% of the time. That 1.52W idle of SAS are due some special Seagate feature, and I'm hoping I would be able to active that or spin down a drive completely. Otherwise "usual" idle is around 3W.
Screenshot 2025-12-06 at 00.31.14.png
KWh per year for RAIDz1 has double of a mirror, but even if we take maximum of 92KWh per year at 0.32 EUR we get 29.44 EUR per year for 4 SAS drives (assuming no spindown takes place). I mean... that's not that bad? Prices are not getting lower, but spending double or triple amount of money today so I can break even in 5 years?..
 
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slowlaris

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Aug 7, 2025
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So I've tried to mitigate fan problem with just bluntly swapping the fans (I've tried a different CPU cooler) and SYS_FAN1 (near the drive cage), but BMC thinks the fans are broken since they have a different RPM setting. I've also tried setting fan thresholds with `ipmitool`, but it didn't work, the same as sending raw commands. I guess it should work, but Fujitsu probably locked it down, or a different raw command ID is needed.

These are the resources I've used:

For now I think I'll put everything back as it was, but what I think should be possible is to plug all fan headers with PWM fan spoofers for Bitcoin rigs (I have to test it though) and drive all fans from a separate fan controller. Granted, you'll need to code in a custom fan curve and it feels a bit wrong to outsource even CPU fan to a user-running service, but approximate savings could be around 20W! Also, there won't be a situation where BMC would crank all fans to the max because the room is too hot or because there's a "Fan test" scheduled to run every midnight (I've had it on mine).

Well, maybe I'd leave CPU fan alone, although 6W at full speed feels like a waste of power, but SYS FAN 1 and 2 and probably PSU fan can be replaced for good, I believe.
 

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celemine1gig

Member
May 25, 2020
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I would suggest leaving the original fan control alone, but instead spoofing it intentionally via microcontrollers.
Reading in the original PWM signal and modifying it, like intended.
Also make sure to also spoof the RPM signal, in the same proportionality.
So, you would modify:
  • The PWM-signal coming from the board, going to your intended fan.
  • The RPM-signal, coming from your intended fan, and going to the board.

That should work just fine, if done right. And you could use nearly every fan type, that you like.
If it would be enough for the cooling needs of the system, though, would logically be a different question.
 

slowlaris

New Member
Aug 7, 2025
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Merry Christmas everyone!

So I've decided to bite the bullet and go with SAS HDDs for the time being, main rationale being the price: while all-SSD pool sounds nice, prices are eye-watering: at least 100 EUR for a used 2TB drive and yes, I've checked various discounts and Black Friday sales...

After scouring eBay I've settled on a lot of 6 disks for ~45 EUR each; I know I could find them cheaper but I was attracted to the listing photos featuring drives made in 2019; to much dismay a little surprise was waiting for me when I opened the box: only one of the drives was made in 2019, and the rest turned out to be from 2015... I'll try to open a dispute with the seller, because it's a bit of a scam in my opinion.

Anyway, then I had to swap HBA again because of the cable issue - old cables which I had were blocking drive fans, and I realized with SAS disks I do need to use stock fans. I've settled on Dell HBA 350i - same LSI3808 chip, but Dell branded. ASPM is not enabled by default but gets enabled after running ASPM script: GitHub - notthebee/AutoASPM: A script that automatically activates ASPM for all supported devices on Linux. I was also able to test drive spindown with this: GitHub - adelolmo/hd-idle: Hard Disk Idle Spin-Down Utility.

I've got following the measurements:
25W (2 DIMMs, HBA, 1 SATA SSD)
35W 8 SAS HDDs spun down
60W when SAS disks are active

I plan to configure hd-idle to spin down after 2 hours of inactivity, should be plenty for my use case. I think 35W is not too bad for 10 TBs in RAIDz2...
 

slowlaris

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Aug 7, 2025
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Another interesting thing is that running `ipmitool sensor`, HBA card is not detected by IPMI (and is not visible in iRMC). As a consequence of this, drive temps are only retrievable via smart tools, and I suspect that's why backplane fan is spinning at minimal RPM. I think BMC has "Fujitsu" hardcoded there and just won't recognize any other card (despite card working perfectly).

I think it should be possible to reflash this Dell HBA 350i to equivalent Fujitsu card, after all, only disk connectors are different.
 

slowlaris

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Aug 7, 2025
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And finally regarding fan swap: I think it's not worth the effort. I've got a box of Arctic 4028 fans (both 6K and 15K), and 15K seems to be the only fully matching option for the PSU; both 6K and Noctua (which is shorter by 8mm and capable of 5K) will be flagged as degraded or broken by a braindead BMC. Needless to say 15K one not only would sound like a jet engine, but also would be very annoying at low RPM.

Yet another approach could be Sunon MagLev fans, but their only 4028 model is just DC, and PWM ones are 20mm thick and max out at 8K RPM...
 

luckylinux

Well-Known Member
Mar 18, 2012
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If you are testing with Linux, give it a try with the Kernel parameter "pcie_aspm=off". I know that the 82599 doesn't really behave too well with ASPM, so give it a try. If that is the case, you can try a more selective approach, that doesn't generally disable ASPM for all devices, but just for the one.
I don't think you get any benefit from ASPM unless it's applicable to all Devices.

If you want your Package C-State to drop below PC2, then you need ASPM of EVERY SINGLE ONE of your Devices to be supported, working and possibly forced.

If you don't do that, there won't be almost any benefit in having ASPM to begin with, possibly with some Exception of the Core C-State (which without Package C-State PC3/PC6/... won't do much anyways IMHO).
 
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luckylinux

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Mar 18, 2012
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Not at present, no. iRMC seems juicy for more exploration but sadly I haven't got time, and Fujitsu haven't been responding to my GPL requests.
Did I miss something ?

In this Post you mentioned having posted on Github the GPL Sources you got from Fujitsu:


Which points to:


Not sure how much useful (there are some Register Addresses we might want to investigate), looking at pwmtach* Subfolders:
Code:
user@UBUNTU:~$:/home/user/fujitsu_irmc_bmc# grep -r -B5 -A10 --color -i speed pwmtach*
pwmtach-6.1.0.0.0-src/data/pwmtach.h-    unsigned char (*disable_fantach_control) (unsigned char ft_num);
pwmtach-6.1.0.0.0-src/data/pwmtach.h-    void (*enable_all_fantach_control) (void);
pwmtach-6.1.0.0.0-src/data/pwmtach.h-    void (*disable_all_fantach_control) (void);
pwmtach-6.1.0.0.0-src/data/pwmtach.h-    void (*enable_counterresolution) (unsigned char pwm_num);
pwmtach-6.1.0.0.0-src/data/pwmtach.h-    unsigned char (*disable_counterresolution) (unsigned char pwm_num);
pwmtach-6.1.0.0.0-src/data/pwmtach.h:    unsigned int  (*get_current_speed) (unsigned char tachnum);
pwmtach-6.1.0.0.0-src/data/pwmtach.h-    void (*set_prescale) (unsigned char pwm_num, unsigned char prescale_value);
pwmtach-6.1.0.0.0-src/data/pwmtach.h-    unsigned int  (*get_prescale) (unsigned char pwm_num);
pwmtach-6.1.0.0.0-src/data/pwmtach.h-    void (*set_dutycycle) (unsigned char pwm_num, int dutycycle_value);
pwmtach-6.1.0.0.0-src/data/pwmtach.h-    void (*set_counterresolution) (unsigned char pwm_num, unsigned int counterres_value);
pwmtach-6.1.0.0.0-src/data/pwmtach.h-    unsigned int  (*get_counterresolution) (unsigned char pwm_num);
pwmtach-6.1.0.0.0-src/data/pwmtach.h:    int (*trigger_read_fanspeed) (unsigned char tachnum);
pwmtach-6.1.0.0.0-src/data/pwmtach.h:    int  (*can_read_fanspeed) (unsigned char tachnum);
pwmtach-6.1.0.0.0-src/data/pwmtach.h-    unsigned int  (*get_num_of_pwms) (void);
pwmtach-6.1.0.0.0-src/data/pwmtach.h-    unsigned int  (*get_num_of_tachs) (void);
pwmtach-6.1.0.0.0-src/data/pwmtach.h-    unsigned int  (*get_pwm_clk) (void);
pwmtach-6.1.0.0.0-src/data/pwmtach.h-    unsigned int  (*get_dutycycle) (unsigned char pwm_num);
pwmtach-6.1.0.0.0-src/data/pwmtach.h-    unsigned char (*get_pwm_control_status) (unsigned char pwm_num);
pwmtach-6.1.0.0.0-src/data/pwmtach.h-    unsigned char (*get_fantach_control_status) (unsigned char ft_num);
pwmtach-6.1.0.0.0-src/data/pwmtach.h-    int (*set_tach_property) (unsigned char property, unsigned char pwm_tach_num, unsigned int value);
pwmtach-6.1.0.0.0-src/data/pwmtach.h-    unsigned int (*get_tach_property) (unsigned char property, unsigned char pwm_tach_num);
pwmtach-6.1.0.0.0-src/data/pwmtach.h-    int (*set_pwm_property) (unsigned char property, unsigned char pwm_tach_num, unsigned int value);
pwmtach-6.1.0.0.0-src/data/pwmtach.h-    unsigned int (*get_pwm_property) (unsigned char property, unsigned char pwm_tach_num);
--
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c-static int
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c-get_tachvalue (struct pwmtach_dev* pdev, unsigned int tachnumber, unsigned int* rpmvalue)
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c-{
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c-    unsigned int retries = 1; //avoid spinning 2.5 seconds within kernel waiting for timeout
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c-
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c:    if (pdev->ppwmtach_hal->ppwmtach_hal_ops->trigger_read_fanspeed(tachnumber) < 0) {
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c:        printk("trigger read fan speed failed\n");
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c-        return -1;
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c-    }
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c-
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c:    while ((retries!=0) && (pdev->ppwmtach_hal->ppwmtach_hal_ops->can_read_fanspeed(tachnumber) != 1))
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c-    {
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c-        schedule_timeout( 0.1 * HZ);
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c-        retries--;
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c-    }
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c-    if (retries == 0)
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c-    {
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c-        //printk("ran out of retries in gettachvalue(tach %d)...returning -1\n",tachnumber & 0x7F);
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c-        return -1;
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c-    }
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c-
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c:    *rpmvalue = pdev->ppwmtach_hal->ppwmtach_hal_ops->get_current_speed (tachnumber);
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c-    return 0;
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c-}
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c-
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c-
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c-static int
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c-configure_fanmap_table (struct pwmtach_dev* pdev, pwmtach_data_t* in_data)
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c-{
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c-    int i=0;
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c-    struct fan_map_entry_t* fanmap_data = (struct fan_map_entry_t*) (in_data->fanmap_dataptr);
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c-    pdev->ppwmtach_hal->num_fans = in_data->num_fans;
--
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-unsigned char get_fantach_control_status (unsigned char pwm_num);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-void enable_all_fantach_control (void);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-void disable_all_fantach_control (void);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-void enable_counterresolution (unsigned char pwm_num);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-unsigned char disable_counterresolution (unsigned char pwm_num);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c:unsigned int  get_current_speed (unsigned char tachnum);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-void set_prescale (unsigned char pwm_num, unsigned char prescale_value);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-unsigned int  get_prescale (unsigned char pwm_num);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-void set_dutycycle (unsigned char pwm_num, int dutycycle_value);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-unsigned int get_dutycycle (unsigned char pwm_num);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-void set_counterresolution (unsigned char pwm_num, unsigned int counterres_value);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-unsigned int  get_counterresolution (unsigned char pwm_num);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c:int trigger_read_fanspeed (unsigned char tachnum);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c:int can_read_fanspeed (unsigned char tachnum);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-unsigned int  get_num_of_pwms (void);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-unsigned int  get_num_of_tachs (void);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-unsigned int  get_pwm_clk (void);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-int set_tach_property (unsigned char property, unsigned char tach_num, unsigned int value);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-unsigned int get_tach_property (unsigned char property, unsigned char tach_num);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-int set_pwm_property (unsigned char property, unsigned char pwm_num, unsigned int value);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-unsigned int get_pwm_property (unsigned char property, unsigned char pwm_num);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-int clear_tach_error(unsigned char tach_num);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-int clear_pwm_errors (void);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-
--
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    disable_fantach_control,
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    enable_all_fantach_control,
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    disable_all_fantach_control,
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    enable_counterresolution,
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    disable_counterresolution,
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c:    get_current_speed,
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    set_prescale,
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    get_prescale,
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    set_dutycycle,
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    set_counterresolution,
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    get_counterresolution,
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c:    trigger_read_fanspeed,
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c:    can_read_fanspeed,
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    get_num_of_pwms,
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    get_num_of_tachs,
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    get_pwm_clk,
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    get_dutycycle,
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    get_pwm_control_status,
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    get_fantach_control_status,
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    set_tach_property,
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    get_tach_property,
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    set_pwm_property,
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    get_pwm_property,
--
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-            break;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    }
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    return ((60 * clockFactor)/rawVal);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-}
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c:unsigned int get_current_speed(unsigned char tachnum)
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-{
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c:    volatile uint8_t CurrentSpeed = 0;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    unsigned char bitOffset = 0;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    int rawdata = 0;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    uint32_t RegAddr = VPWMTACH_REMAP_ADDR + FMSPR0OFF;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    rawdata = (tachnum & 0x80) ? 1 : 0;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    tachnum &= 0x7f;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    bitOffset = tachnum;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-#if defined SOC_PILOT_III || defined SOC_PILOT_IV
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    if(tachnum > MAXFTMCHN_PILOT)
--
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-        bitOffset = tachnum - NOFEXTFTMCHN;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-        RegAddr += PWMTACHEXTOFF;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    }
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-#endif
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c:    CurrentSpeed = pwmtach_read_reg(RegAddr + (bitOffset * 0x0C));
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-   
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    if (rawdata)
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c:        return CurrentSpeed;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c:    return callRPM(tachnum, CurrentSpeed);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-}
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-void set_prescale (unsigned char pwm_num, unsigned char prescale_value)
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-{
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    uint8_t prev_pwm_ctrl_state = 0;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    unsigned char bitOffset = 0;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    uint32_t RegAddr = VPWMTACH_REMAP_ADDR + PWPSR0OFF;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    uint8_t RegVal;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-
--
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-#endif
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    return pwmtach_read_reg(RegAddr + (bitOffset * 4));
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-}
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c:int trigger_read_fanspeed (unsigned char tachnum)
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-{
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    //unsigned char bitOffset = 0;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    //tachnum &= 0x7F; //ignore RAW-bit
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    //
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    //bitOffset = tachnum;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    return 0;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-}
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c:int  can_read_fanspeed(unsigned char tachnum)
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-{
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    volatile uint8_t ctrl_stat_val;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    uint32_t RegAddr = VPWMTACH_REMAP_ADDR + FMCSR0OFF;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    unsigned char bitOffset = 0;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    tachnum &= 0x7F; //ignore RAW-bit
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-   
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    bitOffset = tachnum;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-#if defined SOC_PILOT_III || defined SOC_PILOT_IV
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    if(tachnum > MAXFTMCHN_PILOT)
--
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-#endif
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    ctrl_stat_val = pwmtach_read_reg(RegAddr + (bitOffset * 0x0C));
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-        /* Clearing the bits - One Sec Error, Overflow and Over Threshold - if set,
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c:           because only when cleared we can read the fan speed */
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    if ((ctrl_stat_val & 0x0E) != 0)
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    {
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-        pwmtach_write_reg (ctrl_stat_val & 0xFE, RegAddr + (bitOffset * 0x0C));
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    }
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c:    if (ctrl_stat_val & SPEED_READY)
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-        return 1;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    return 0;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-}
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-unsigned int get_num_of_pwms (void)
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-{
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-        return NUMPWM;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-}
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-
--
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-unsigned int get_tach_overflow (unsigned char tach_num)
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-{
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    return get_tach_fmcsr_bit (tach_num, 2);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-}
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c:unsigned int get_tach_speedready (unsigned char tach_num)
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-{
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    return get_tach_fmcsr_bit (tach_num, 0);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-}
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-/*
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- * @fn set_pwm_tach_property
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- * @brief Generic function to set a property of either pwm or tach.
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- * @param[in] property - Property to set and this can be different for different platform.
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- * @param[in] pwm_tach_num - pwm number or tach number according to property.
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- * @param[in] value - appropriate value to set
--
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- * PWM TACH PROPERTY
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-#define TACH_FILTERSELECT                0x01
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-#define TACH_CLOCKSELECT                0x02
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-#define TACH_ERROR                        0x03
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-#define TACH_OVERFLOW                    0x04
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c:#define TACH_SPEEDREADY                    0x05
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-#define PWM_DIVISION_128_64                0x06
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-#define PWM_CLOCKSELECT                    0x07
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-#define PWM_PRESCALEVALUE                0x08
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-#define PWM_COUNTERRESOLUTIONVALUE        0x09
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-*/
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-int set_pwm_tach_property (unsigned char property, unsigned char pwm_tach_num, unsigned int value)
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-{
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    switch (property)
--
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    case TACH_CLOCKSELECT:
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-        /* This takes only 2 bits */
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-        return set_tach_clockselect (pwm_tach_num, value & 0x03);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    case TACH_ERROR:
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    case TACH_OVERFLOW:
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c:    case TACH_SPEEDREADY:
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-        // Currently not supported...
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-        return -1;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-        break;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-       
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    case PWM_DIVISION_128_64:
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-        return set_pwm_division (pwm_tach_num, value & 0x01);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-        break;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    case PWM_CLOCKSELECT:
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-        return set_pwm_clockselect (pwm_tach_num, value & 0x01);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    case PWM_PRESCALEVALUE:
--
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-        break;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    case TACH_ERROR:
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-        return get_tach_error (pwm_tach_num);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    case TACH_OVERFLOW:
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-        return get_tach_overflow (pwm_tach_num);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c:    case TACH_SPEEDREADY:
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c:        return get_tach_speedready (pwm_tach_num);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    case PWM_DIVISION_128_64:
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    case PWM_CLOCKSELECT:
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    case PWM_PRESCALEVALUE:
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    case PWM_COUNTERRESOLUTIONVALUE:
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-        // Currently not supported...
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    default:
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-        return 0xFFFFFFFF;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    }
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-    return 0;   
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-}
--
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw.h-#define FILTER_DISABLE                    1<<5
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw.h-#define INTERRUPT_ENABLE                1<<4
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw.h-#define FTIN_TOGGLE_ERR                    1<<3
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw.h-#define OVERFLOW_ERR                    1<<2
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw.h-#define OVERTHRESHOLD_ERR                1<<1
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw.h:#define SPEED_READY                    1<<0
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw.h-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw.h-#define CLK_FREQ_500HZ        (500)
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw.h-#define CLK_FREQ_2KHZ        (2*1000)
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw.h-#define CLK_FREQ_4KHZ        (4*1000)
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw.h-#define CLK_FREQ_8KHZ        (8*1000)
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw.h-#define CLK_FREQ_16KHZ        (16*1000)
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw.h-#define CLK_FREQ_200KHZ        (200*1000)
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw.h-#define CLK_FREQ_8_3_MHZ    (8333*1000)
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw.h-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw.h-
--
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw_prop.h-/* PWM TACH PROPERTY */
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw_prop.h-#define TACH_FILTERSELECT            0x01
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw_prop.h-#define TACH_CLOCKSELECT             0x02
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw_prop.h-#define TACH_ERROR                   0x03
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw_prop.h-#define TACH_OVERFLOW                0x04
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw_prop.h:#define TACH_SPEEDREADY              0x05
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw_prop.h-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw_prop.h-#define PWM_DIVISION_128_64          0x06
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw_prop.h-#define PWM_CLOCKSELECT              0x07
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw_prop.h-#define PWM_PRESCALEVALUE            0x08
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw_prop.h-#define PWM_COUNTERRESOLUTIONVALUE   0x09
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw_prop.h-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw_prop.h-/* ******************** */
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw_prop.h-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw_prop.h-#endif
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw_prop.h-