Hey, did you get around with swapping PSU fan with Noctua? I'm considering the same setup (waiting for a reply from the seller) and most probably there'll be 450W PSU also.
Fujitsu TX1320 M3 - Cheap low power server (barebone)
- Thread starter Rand__
- Start date
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I am currently on it. Just got the Molex Connectors and the crimbs for noctua cables. I needs more than swapping the fans.
I gonna update here with a full guide what i did once i finished.
Gruenschnabel sent me this PM after I again declined to provide the encryption keys used to generate a license:
You are not entitled to a free iRMC key. If, like many others, you can invest the time to extract the values from the file and put them into the proof of concept that I provided, for free, then you can have a license key.
Discussion of keygens is against the forum rules, and quite frankly, your attitude over this matter sucks.
I can't stop someone else from sharing the values with you (dear reader, please don't), but I will be much less inclined to help the homelab community in the future if entitled people like you start showing up in my DMs demanding free stuff.
Suffice to say, I am not a fan of this entitled attitude. You know what people did before my blog post for iRMC keys? They paid Fujitsu.Gruenschnabel said:
You are not entitled to a free iRMC key. If, like many others, you can invest the time to extract the values from the file and put them into the proof of concept that I provided, for free, then you can have a license key.
Discussion of keygens is against the forum rules, and quite frankly, your attitude over this matter sucks.
I can't stop someone else from sharing the values with you (dear reader, please don't), but I will be much less inclined to help the homelab community in the future if entitled people like you start showing up in my DMs demanding free stuff.
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Your behavior is ridiculous. Instead of just sharing three damn values, you’re making such a big deal out of this nonsense. So you’re the guy who steals money from Fujitsu, but you refuse to share three values?
How pathetic is that? First you steal from the company, and then you act all self-righteous over three values. Ridiculous! Your behavior couldn’t be more foolish.
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My friend, with that displayed attitude, no one here will provide you with anything. At least if they are in their right mind.
Calling people names, if you don't get what you want is best KINDERGARTEN behavior. Absolutely laughable and honestly insolent.
If you cannot get it done, either learn something, or leave it be.
I would propose, that you swiftly apologize to hmartin. But your choice, how you want to be seen.
Do you guys even know what kindergarten is?
Because that’s exactly what this whole thing feels like. The guy publicly releases a method to generate licenses, fully open, basically stealing money from Fujitsu and now he refuses to share three simple values or even give a tiny hint in a private message to someone who’s not that deep into the topic? Seriously? That’s pure double standards.
I posted a lot of stuff here recently, do i look like a fujitsu employee that wants to **** him????
He’s fine with making a tool/finding a way that costs Fujitsu a ton of money, but suddenly acts all righteous when someone asks for help. Come on. Maybe take a look in the mirror before crying about “ethics.” This is textbook kindergarten behavior.
Furthermore, i tried to clarify it by pm. He was the guy starting to escalate it here.
Oh wow. I missed all the drama... anyway...
I have a question regarding onboard M.2 slots: I've found board brochure for which says that one slot is SATA, another one is NVMe/SATA, so my hopes of having a NVMe mirror has shattered. I've read in the thread that people usually put NVMe in a PCIe slot adapter though.
If I understand correctly, any "native" adapter would just fit 1 drive, and if there are two of them, some PCIe switch should also be present? Also I'm confused about bandwidth, as in my case two top PCIe slots will be taken (by HBA and videocard).
UPDATE: ok I've read about bifurcation, but I'll wait on the actual server to arrive. It's M4 and chipset is C246. Not sure there's a major difference...
I have a question regarding onboard M.2 slots: I've found board brochure for which says that one slot is SATA, another one is NVMe/SATA, so my hopes of having a NVMe mirror has shattered. I've read in the thread that people usually put NVMe in a PCIe slot adapter though.
If I understand correctly, any "native" adapter would just fit 1 drive, and if there are two of them, some PCIe switch should also be present? Also I'm confused about bandwidth, as in my case two top PCIe slots will be taken (by HBA and videocard).
UPDATE: ok I've read about bifurcation, but I'll wait on the actual server to arrive. It's M4 and chipset is C246. Not sure there's a major difference...
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This thread is, so far, about the M3, which does not have any native M.2 sockets.
For the M4, in the D3673 datasheet it says that the PCIe slots are x8, x4, and x1. So Fujitsu has bifurcated the 16 PEG lanes into x8x4x4 with the remaining x4 going to the NVMe slot. The processor supports this natively and there's no additional PCIe switch.
Hmm I'm not sure I'm getting you right. Here's the board photo and excerpt from the brochure:This thread is, so far, about the M3, which does not have any native M.2 sockets.
For the M4, in the D3673 datasheet it says that the PCIe slots are x8, x4, and x1. So Fujitsu has bifurcated the 16 PEG lanes into x8x4x4 with the remaining x4 going to the NVMe slot. The processor supports this natively and there's no additional PCIe switch.
So 2x8 is already x16 (PEG or not), then we have x4 + x1 (not sure whether x1 is coming from the chipset) and another x4 in NVMe slot?
Also I wasn't able to find system diagram. Does it exist for M3?
Sorry, I guess I need to finish my coffee before I reply. The datasheet for the TX1320 M4 states that there are indeed two PCIe x8 slots. That datasheet doesn't mention how the NVMe slot is wired:
I would guess that it's coming off the PCH: Intel® C246 Chipset - Product Specifications | Intel
On the M3, the PCIe x1 slot is off the PCH. I'm not aware of a system diagram for the M3.
PCIe x8 to two NVMe cards don't have a PCIe switch. They require bifurcation support on the motherboard to split the x8 slot into x4x4. I would doubt this motherboard supports it in BIOS though. You could pick up a PCIe to U.2 adapter and use one of these (it is a PCIe switch) to support 4 NVMe drives. Be aware that they do add ~7W of consumption and require some form of active cooling.
Thanks! Interesting adapter. I won't go this route now since I've already blindly went with 9500-8i for 100 bucks from China...
hardware costs are adding up really fast.Once server arrives I'll test local M.2 with what I have on hand and report here.
It seems I can find it cheaper. Indeed, pairing it with M.2 to U.2 adapter would allow me to still have NVMe but also free up PCIe slots. I wonder if these 7W come from using all 4 drives: https://forums.servethehome.com/ind...arrier-2-5-inch-form-factor.25533/post-413050 . If it draws 3W for 2 drives I think I will accept my fate. I also wonder if that switch supports ASPM, then it would be a very interesting upgrade. Thanks again @hmartin
Hello everyone, i have a problem with my Dell Intel X520-DA2 0942V6 NIC. I get link-flapping in my TX 1320 M3. I checked the modules with ethtool on TrueNAS, which is running on that machine. Seems to be fine. Anyone else is using that card and may have some hints for me about PCI Slot, Bios Setting or other settings?
If you are testing with Linux, give it a try with the Kernel parameter "pcie_aspm=off". I know that the 82599 doesn't really behave too well with ASPM, so give it a try. If that is the case, you can try a more selective approach, that doesn't generally disable ASPM for all devices, but just for the one.
I don't think you get any benefit from ASPM unless it's applicable to all Devices.
If you want your Package C-State to drop below PC2, then you need ASPM of EVERY SINGLE ONE of your Devices to be supported, working and possibly forced.
If you don't do that, there won't be almost any benefit in having ASPM to begin with, possibly with some Exception of the Core C-State (which without Package C-State PC3/PC6/... won't do much anyways IMHO).
Not at present, no. iRMC seems juicy for more exploration but sadly I haven't got time, and Fujitsu haven't been responding to my GPL requests.
Did I miss something ?
In this Post you mentioned having posted on Github the GPL Sources you got from Fujitsu:
Which points to:
GitHub - halmartin/fujitsu_irmc_bmc: GPL source code for the Fujitsu iRMC S4 BMC
GPL source code for the Fujitsu iRMC S4 BMC. Contribute to halmartin/fujitsu_irmc_bmc development by creating an account on GitHub.
github.com
Not sure how much useful (there are some Register Addresses we might want to investigate), looking at
pwmtach* Subfolders:
Code:
user@UBUNTU:~$:/home/user/fujitsu_irmc_bmc# grep -r -B5 -A10 --color -i speed pwmtach*
pwmtach-6.1.0.0.0-src/data/pwmtach.h- unsigned char (*disable_fantach_control) (unsigned char ft_num);
pwmtach-6.1.0.0.0-src/data/pwmtach.h- void (*enable_all_fantach_control) (void);
pwmtach-6.1.0.0.0-src/data/pwmtach.h- void (*disable_all_fantach_control) (void);
pwmtach-6.1.0.0.0-src/data/pwmtach.h- void (*enable_counterresolution) (unsigned char pwm_num);
pwmtach-6.1.0.0.0-src/data/pwmtach.h- unsigned char (*disable_counterresolution) (unsigned char pwm_num);
pwmtach-6.1.0.0.0-src/data/pwmtach.h: unsigned int (*get_current_speed) (unsigned char tachnum);
pwmtach-6.1.0.0.0-src/data/pwmtach.h- void (*set_prescale) (unsigned char pwm_num, unsigned char prescale_value);
pwmtach-6.1.0.0.0-src/data/pwmtach.h- unsigned int (*get_prescale) (unsigned char pwm_num);
pwmtach-6.1.0.0.0-src/data/pwmtach.h- void (*set_dutycycle) (unsigned char pwm_num, int dutycycle_value);
pwmtach-6.1.0.0.0-src/data/pwmtach.h- void (*set_counterresolution) (unsigned char pwm_num, unsigned int counterres_value);
pwmtach-6.1.0.0.0-src/data/pwmtach.h- unsigned int (*get_counterresolution) (unsigned char pwm_num);
pwmtach-6.1.0.0.0-src/data/pwmtach.h: int (*trigger_read_fanspeed) (unsigned char tachnum);
pwmtach-6.1.0.0.0-src/data/pwmtach.h: int (*can_read_fanspeed) (unsigned char tachnum);
pwmtach-6.1.0.0.0-src/data/pwmtach.h- unsigned int (*get_num_of_pwms) (void);
pwmtach-6.1.0.0.0-src/data/pwmtach.h- unsigned int (*get_num_of_tachs) (void);
pwmtach-6.1.0.0.0-src/data/pwmtach.h- unsigned int (*get_pwm_clk) (void);
pwmtach-6.1.0.0.0-src/data/pwmtach.h- unsigned int (*get_dutycycle) (unsigned char pwm_num);
pwmtach-6.1.0.0.0-src/data/pwmtach.h- unsigned char (*get_pwm_control_status) (unsigned char pwm_num);
pwmtach-6.1.0.0.0-src/data/pwmtach.h- unsigned char (*get_fantach_control_status) (unsigned char ft_num);
pwmtach-6.1.0.0.0-src/data/pwmtach.h- int (*set_tach_property) (unsigned char property, unsigned char pwm_tach_num, unsigned int value);
pwmtach-6.1.0.0.0-src/data/pwmtach.h- unsigned int (*get_tach_property) (unsigned char property, unsigned char pwm_tach_num);
pwmtach-6.1.0.0.0-src/data/pwmtach.h- int (*set_pwm_property) (unsigned char property, unsigned char pwm_tach_num, unsigned int value);
pwmtach-6.1.0.0.0-src/data/pwmtach.h- unsigned int (*get_pwm_property) (unsigned char property, unsigned char pwm_tach_num);
--
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c-static int
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c-get_tachvalue (struct pwmtach_dev* pdev, unsigned int tachnumber, unsigned int* rpmvalue)
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c-{
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c- unsigned int retries = 1; //avoid spinning 2.5 seconds within kernel waiting for timeout
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c-
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c: if (pdev->ppwmtach_hal->ppwmtach_hal_ops->trigger_read_fanspeed(tachnumber) < 0) {
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c: printk("trigger read fan speed failed\n");
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c- return -1;
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c- }
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c-
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c: while ((retries!=0) && (pdev->ppwmtach_hal->ppwmtach_hal_ops->can_read_fanspeed(tachnumber) != 1))
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c- {
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c- schedule_timeout( 0.1 * HZ);
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c- retries--;
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c- }
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c- if (retries == 0)
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c- {
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c- //printk("ran out of retries in gettachvalue(tach %d)...returning -1\n",tachnumber & 0x7F);
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c- return -1;
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c- }
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c-
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c: *rpmvalue = pdev->ppwmtach_hal->ppwmtach_hal_ops->get_current_speed (tachnumber);
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c- return 0;
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c-}
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c-
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c-
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c-static int
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c-configure_fanmap_table (struct pwmtach_dev* pdev, pwmtach_data_t* in_data)
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c-{
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c- int i=0;
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c- struct fan_map_entry_t* fanmap_data = (struct fan_map_entry_t*) (in_data->fanmap_dataptr);
pwmtach-6.1.0.0.0-src/data/pwmtachmain.c- pdev->ppwmtach_hal->num_fans = in_data->num_fans;
--
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-unsigned char get_fantach_control_status (unsigned char pwm_num);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-void enable_all_fantach_control (void);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-void disable_all_fantach_control (void);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-void enable_counterresolution (unsigned char pwm_num);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-unsigned char disable_counterresolution (unsigned char pwm_num);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c:unsigned int get_current_speed (unsigned char tachnum);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-void set_prescale (unsigned char pwm_num, unsigned char prescale_value);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-unsigned int get_prescale (unsigned char pwm_num);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-void set_dutycycle (unsigned char pwm_num, int dutycycle_value);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-unsigned int get_dutycycle (unsigned char pwm_num);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-void set_counterresolution (unsigned char pwm_num, unsigned int counterres_value);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-unsigned int get_counterresolution (unsigned char pwm_num);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c:int trigger_read_fanspeed (unsigned char tachnum);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c:int can_read_fanspeed (unsigned char tachnum);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-unsigned int get_num_of_pwms (void);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-unsigned int get_num_of_tachs (void);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-unsigned int get_pwm_clk (void);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-int set_tach_property (unsigned char property, unsigned char tach_num, unsigned int value);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-unsigned int get_tach_property (unsigned char property, unsigned char tach_num);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-int set_pwm_property (unsigned char property, unsigned char pwm_num, unsigned int value);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-unsigned int get_pwm_property (unsigned char property, unsigned char pwm_num);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-int clear_tach_error(unsigned char tach_num);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-int clear_pwm_errors (void);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-
--
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- disable_fantach_control,
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- enable_all_fantach_control,
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- disable_all_fantach_control,
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- enable_counterresolution,
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- disable_counterresolution,
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c: get_current_speed,
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- set_prescale,
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- get_prescale,
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- set_dutycycle,
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- set_counterresolution,
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- get_counterresolution,
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c: trigger_read_fanspeed,
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c: can_read_fanspeed,
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- get_num_of_pwms,
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- get_num_of_tachs,
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- get_pwm_clk,
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- get_dutycycle,
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- get_pwm_control_status,
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- get_fantach_control_status,
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- set_tach_property,
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- get_tach_property,
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- set_pwm_property,
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- get_pwm_property,
--
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- break;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- }
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- return ((60 * clockFactor)/rawVal);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-}
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c:unsigned int get_current_speed(unsigned char tachnum)
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-{
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c: volatile uint8_t CurrentSpeed = 0;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- unsigned char bitOffset = 0;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- int rawdata = 0;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- uint32_t RegAddr = VPWMTACH_REMAP_ADDR + FMSPR0OFF;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- rawdata = (tachnum & 0x80) ? 1 : 0;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- tachnum &= 0x7f;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- bitOffset = tachnum;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-#if defined SOC_PILOT_III || defined SOC_PILOT_IV
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- if(tachnum > MAXFTMCHN_PILOT)
--
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- bitOffset = tachnum - NOFEXTFTMCHN;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- RegAddr += PWMTACHEXTOFF;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- }
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-#endif
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c: CurrentSpeed = pwmtach_read_reg(RegAddr + (bitOffset * 0x0C));
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- if (rawdata)
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c: return CurrentSpeed;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c: return callRPM(tachnum, CurrentSpeed);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-}
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-void set_prescale (unsigned char pwm_num, unsigned char prescale_value)
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-{
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- uint8_t prev_pwm_ctrl_state = 0;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- unsigned char bitOffset = 0;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- uint32_t RegAddr = VPWMTACH_REMAP_ADDR + PWPSR0OFF;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- uint8_t RegVal;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-
--
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-#endif
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- return pwmtach_read_reg(RegAddr + (bitOffset * 4));
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-}
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c:int trigger_read_fanspeed (unsigned char tachnum)
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-{
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- //unsigned char bitOffset = 0;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- //tachnum &= 0x7F; //ignore RAW-bit
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- //
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- //bitOffset = tachnum;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- return 0;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-}
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c:int can_read_fanspeed(unsigned char tachnum)
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-{
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- volatile uint8_t ctrl_stat_val;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- uint32_t RegAddr = VPWMTACH_REMAP_ADDR + FMCSR0OFF;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- unsigned char bitOffset = 0;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- tachnum &= 0x7F; //ignore RAW-bit
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- bitOffset = tachnum;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-#if defined SOC_PILOT_III || defined SOC_PILOT_IV
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- if(tachnum > MAXFTMCHN_PILOT)
--
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-#endif
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- ctrl_stat_val = pwmtach_read_reg(RegAddr + (bitOffset * 0x0C));
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- /* Clearing the bits - One Sec Error, Overflow and Over Threshold - if set,
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c: because only when cleared we can read the fan speed */
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- if ((ctrl_stat_val & 0x0E) != 0)
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- {
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- pwmtach_write_reg (ctrl_stat_val & 0xFE, RegAddr + (bitOffset * 0x0C));
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- }
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c: if (ctrl_stat_val & SPEED_READY)
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- return 1;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- return 0;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-}
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-unsigned int get_num_of_pwms (void)
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-{
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- return NUMPWM;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-}
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-
--
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-unsigned int get_tach_overflow (unsigned char tach_num)
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-{
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- return get_tach_fmcsr_bit (tach_num, 2);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-}
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c:unsigned int get_tach_speedready (unsigned char tach_num)
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-{
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- return get_tach_fmcsr_bit (tach_num, 0);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-}
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-/*
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- * @fn set_pwm_tach_property
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- * @brief Generic function to set a property of either pwm or tach.
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- * @param[in] property - Property to set and this can be different for different platform.
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- * @param[in] pwm_tach_num - pwm number or tach number according to property.
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- * @param[in] value - appropriate value to set
--
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- * PWM TACH PROPERTY
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-#define TACH_FILTERSELECT 0x01
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-#define TACH_CLOCKSELECT 0x02
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-#define TACH_ERROR 0x03
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-#define TACH_OVERFLOW 0x04
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c:#define TACH_SPEEDREADY 0x05
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-#define PWM_DIVISION_128_64 0x06
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-#define PWM_CLOCKSELECT 0x07
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-#define PWM_PRESCALEVALUE 0x08
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-#define PWM_COUNTERRESOLUTIONVALUE 0x09
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-*/
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-int set_pwm_tach_property (unsigned char property, unsigned char pwm_tach_num, unsigned int value)
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-{
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- switch (property)
--
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- case TACH_CLOCKSELECT:
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- /* This takes only 2 bits */
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- return set_tach_clockselect (pwm_tach_num, value & 0x03);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- case TACH_ERROR:
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- case TACH_OVERFLOW:
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c: case TACH_SPEEDREADY:
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- // Currently not supported...
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- return -1;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- break;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- case PWM_DIVISION_128_64:
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- return set_pwm_division (pwm_tach_num, value & 0x01);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- break;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- case PWM_CLOCKSELECT:
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- return set_pwm_clockselect (pwm_tach_num, value & 0x01);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- case PWM_PRESCALEVALUE:
--
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- break;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- case TACH_ERROR:
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- return get_tach_error (pwm_tach_num);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- case TACH_OVERFLOW:
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- return get_tach_overflow (pwm_tach_num);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c: case TACH_SPEEDREADY:
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c: return get_tach_speedready (pwm_tach_num);
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- case PWM_DIVISION_128_64:
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- case PWM_CLOCKSELECT:
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- case PWM_PRESCALEVALUE:
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- case PWM_COUNTERRESOLUTIONVALUE:
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- // Currently not supported...
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- default:
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- return 0xFFFFFFFF;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- }
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c- return 0;
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtachmain_hw.c-}
--
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw.h-#define FILTER_DISABLE 1<<5
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw.h-#define INTERRUPT_ENABLE 1<<4
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw.h-#define FTIN_TOGGLE_ERR 1<<3
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw.h-#define OVERFLOW_ERR 1<<2
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw.h-#define OVERTHRESHOLD_ERR 1<<1
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw.h:#define SPEED_READY 1<<0
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw.h-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw.h-#define CLK_FREQ_500HZ (500)
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw.h-#define CLK_FREQ_2KHZ (2*1000)
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw.h-#define CLK_FREQ_4KHZ (4*1000)
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw.h-#define CLK_FREQ_8KHZ (8*1000)
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw.h-#define CLK_FREQ_16KHZ (16*1000)
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw.h-#define CLK_FREQ_200KHZ (200*1000)
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw.h-#define CLK_FREQ_8_3_MHZ (8333*1000)
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw.h-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw.h-
--
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw_prop.h-/* PWM TACH PROPERTY */
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw_prop.h-#define TACH_FILTERSELECT 0x01
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw_prop.h-#define TACH_CLOCKSELECT 0x02
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw_prop.h-#define TACH_ERROR 0x03
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw_prop.h-#define TACH_OVERFLOW 0x04
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw_prop.h:#define TACH_SPEEDREADY 0x05
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw_prop.h-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw_prop.h-#define PWM_DIVISION_128_64 0x06
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw_prop.h-#define PWM_CLOCKSELECT 0x07
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw_prop.h-#define PWM_PRESCALEVALUE 0x08
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw_prop.h-#define PWM_COUNTERRESOLUTIONVALUE 0x09
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw_prop.h-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw_prop.h-/* ******************** */
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw_prop.h-
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw_prop.h-#endif
pwmtach_hw-6.2.0.0.0-ARM-PILOT-src/data/pwmtach_hw_prop.h-