Thank you wery mutch,but i dont no this code what is.806F8 platform 10 - stepping B3
( platform 87 is SPR-SP )
your BIOS also must have uncore support module.
This only cpu code but no microcode.
Thank you wery mutch,but i dont no this code what is.806F8 platform 10 - stepping B3
( platform 87 is SPR-SP )
your BIOS also must have uncore support module.
you need microcode for cpuid 806F8 platform 10Thank you wery mutch,but i dont no this code what is.
This only cpu code but no microcode.
Just curious since i am also interested in 9480 Max (the prices are getting more interesting).you need microcode for cpuid 806F8 platform 10
they fit in a LGA4677 socket with E1C Carrier which supports the wings of the Xeon Max.Just curious since i am also interested in 9480 Max (the prices are getting more interesting).
I guessed they are only compatible with the Mainboards that officially support them Gigabyte and Supermicro C741.
Also because they have this weird/different cpu shape, or is there any chance that they would work on other mainboards that do not list them? I am also asking because you speak about the microcodes.
they fit in a LGA4677 socket with E1C Carrier which supports the wings of the Xeon Max.
you need C741 at least and BIOS Support, not only microcode. there is a support module(a kind of uncore microcode) for every stepping and
physical chop(XCC,MCC)
View attachment 37790View attachment 37791
if your BIOS don't support Xeon Max natively, i doubt you can add it manualy.(but i can be wrong - that happend lately)
This one maybe?
I dont no this last one microcode ok?
On the bios file have same HBM function.
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806F4 is E0, D0 (806F3) will not work.Are there any known E0/E1 SPR-SP chips with accelerators (other that weird Q03J which seems to use D0 microcode)?
In chart from YuuKi_AnS (https://pbs.twimg.com/media/FXIgH-iVUAE2S2p?format=jpg&name=4096x4096) it seems like E2/E3 might have been built due to UPI link bugs (there are of course probably more issues fixed in each stepping)?806F4 is E0, D0 (806F3) will not work.
most of the errata(bugs) are not in the core section. do not expect accelerators to work properly in stepping E0.
they can, but for what reason intel builded E2,E3,E4,E5 ???
prepared and translated to english.In chart from YuuKi_AnS (https://pbs.twimg.com/media/FXIgH-iVUAE2S2p?format=jpg&name=4096x4096) it seems like E2/E3 might have been built due to UPI link bugs (there are of course probably more issues fixed in each stepping)?
ask the seller for HWinfo Report file (bus screenshot)I found Q0KM mentioned, which might be 8480+ equivalent, which has one of each accelerator, but I haven't been able to find much information.
there are some known SPR-WS ES2 but not found for sale.there still have not been any SPR-SP or EMR-SP ES found with unlocked multiplier yet, correct?
are all of these just equivalents to the retail counterparts? or do any have different core counts?there are some known SPR-WS ES2 but not found for sale.
ES2 = "0000" there is no equivalent.are all of these just equivalents to the retail counterparts? or do any have different core counts?