DDR5 ECC SO-DIMMs availability

[pimposh]

Anyone seen DDR5 ECC SO-DIMMS (4800+) 32/48GB modules available somewhere ?
Just got my new node delivered, unfortunately by choice of design although it's W680 based it is using SO-DIMM form factor.

This "on-die ecc" effectivelly messes up searching engines and i got troubles finding real ones.

 

[BlueFox]

Here's one: M426R4GA3BB0-CQK - 1x 32GB DDR5-4800 SODIMM PC5-38400S Dual Rank x8 Replacement

Can search other retailers for the part number.

 

[pimposh]

Thanks!
So are these ECC or not ECC:

Kingston Server Memory: DDR5 5600MT/s ECC Unbuffered SODIMM - Kingston Technology

Kingston Server Premier memory is designed for Data Centers. This Memory specification is: DDR5 5600MT/s ECC Unbuffered SODIMM

www.kingston.com

Wtf is this on-die-ecc mumbling ? Since when Kingston account on-die-ecc as inline-ecc...

 

[nabsltd]

This "on-die ecc" effectivelly messes up searching engines and i got troubles finding real ones.

Try "EC8" to restrict to the ECC we are all used to.

 

[BlueFox]

Thanks!
So are these ECC or not ECC:

Kingston Server Memory: DDR5 5600MT/s ECC Unbuffered SODIMM - Kingston Technology

Kingston Server Premier memory is designed for Data Centers. This Memory specification is: DDR5 5600MT/s ECC Unbuffered SODIMM

www.kingston.com

Wtf is this on-die-ecc mumbling ?

Says ECC many times on that page, which should give you the answer.

As for on-die ECC: DDR5 SDRAM - Wikipedia

 

[pimposh]

Says ECC many times on that page, which should give you the answer.

As for on-die ECC: DDR5 SDRAM - Wikipedia

But PDF says - on-die-ECC thats why i got shocked what is considered to be ECC by Kingston.

 

[BlueFox]

All DDR5 has on-die ECC, so you can effectively ignore that as a "feature". If it didn't, it wouldn't be DDR5. Manufacturers don't call that ECC memory...they call it DDR5. ECC is still dependent on extra data lines to the CPU.

 

[pimposh]

That is what i knew. So for example Kingston memory modules i linked above - are NOT ECC in contrary to product description in datasheet. Correct ?

 

[BlueFox]

They most certainly are ECC.

 

[pimposh]

I'm dumb sorry. I didn't noticed marked line. But... given density shouldn;t it be 80 bit in this case?

 

[BlueFox]

DDR5 can do either 72 or 80 bit for ECC. 64 bit is non-ECC.

 

[pimposh]

Thanks! Will order and report upon assembly.

 

[twin_savage]

Try "EC8" to restrict to the ECC we are all used to.

Technically there is no such thing as EC8 DDR5 UDIMMs according to JEDEC... even though we can obviously see 80 bit widths on these UDIMMs based on package count.
If you look at socket pin outs it would appear AMD AM5 can't use EC8 but Intel LGA1700 can. AM5 is relegated to EC4.

 

[pimposh]

If you look at socket pin outs it would appear AMD AM5 can't use EC8 but Intel LGA1700 can. AM5 is relegated to EC4.

Would you kindly elaborate on above ?

 

[twin_savage]

If you look at the names of the pins on an AM5 socket, there are only 4 check bit pins per 32 bit subchannel, but LGA1700 has a full 8 "extra" pins dedicated for each 32 bit DDR5 subchannel (conveniently named something completely different than what AMD calls them).
This means AM5 can't actually use EC8 because it doesn't physically have enough traces to connect to it, but LGA1700 does even though EC8 UDIMMs are not part of the JEDEC DDR5 memory spec.
If you look at SMBIOS data on each respective platform, it seems to corroborate this.

Intel has gone outside of JEDEC in the past though, they are using MCRDIMMs which are not a JEDEC spec, so it seems plausible that Intel is going above and beyond here. I'm just surprised that the memory producers are making DDR5 UDIMMs with the full 80 bits worth of chips on them even though JEDEC only calls for 72 bits.

 

[pimposh]

One more thing.

Given on-die-ecc existence is it expected to have less errors to be corrected by in-line ecc ? And if so, in-line ECC lost bit of it's value ? Seems valid right ?

 

[twin_savage]

Given on-die-ecc existence is it expected to have less errors to be corrected by in-line ecc ? And if so, in-line ECC lost bit of it's value ? Seems valid right ?

It's hard to say, I've heard part of the reason for adoption of inline ECC is so that the manufactures can use lower quality DRAM dies with higher error rates which might cancel out some of it's benefits as compared to previous generations of memory.
One thing inline ECC doesn't do that "real" or sideband ECC does is inform that an error has taken place and this is important to know.

 

[a25b]

Hi everyone,

I am also pretty interested in this. I recently found this supermicro board: X14SAV-TLN4F | Motherboards | Produkte | Supermicro
Here they state that it can use DDR5 ECC SO-DIMM.

Error Detection

Corrects single-bit errors Detects double-bit errors (using ECC memory)

As the author of this thread I started to search for "real" DDR5 SO-DIMM. Looking for EC8 or X80. I also found the Kingston Server RAM
KSM56T46BD8KM. On some (price) Search engines the features for this is:



So I assume this should be "Real" ECC. My additional question is: Is that comparable to the ECC which we know from uDIMM ECC? (I am not refering to the registered versions)

As the board has a W800 chipset and you can use CPUs that also support that features it should be, correct?

Thanks in advance

Alex

 

[siematos]

... Kingston Server RAM KSM56T46BD8KM. ...

Yes, that Model has additional banks for storing the extra bits. It's analogous to UDIMM ECC. The pin layout is a bit different, the size is a bit different, it typically has slightly worse timings, but it's essentially the same thing.