AMD ES ZS1406E2VJUG5 microcode version?

kalahan512

New Member
Jul 18, 2019
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0
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Hello i have order a 2S1404E2VJUG5 there anyproof if i'ts working or not?(like a specific board) Dell PowerEdge R6515/R7515 this cpu is working on that server? if yes i want this rom (my board is Gigabyte MZ31-AR0 rev. 2.x)

(Happy new year and merry christmas)
 

unblock_retold

New Member
Dec 22, 2019
5
0
1
Hello i have order a 2S1404E2VJUG5 there anyproof if i'ts working or not?(like a specific board) Dell PowerEdge R6515/R7515 this cpu is working on that server? if yes i want this rom (my board is Gigabyte MZ31-AR0 rev. 2.x)

(Happy new year and merry christmas)
Probably this motherboad works, I've heard some some makeit work on Asus motherboard, not sure about this, could you inform us if you make it work on your MZ31?
 

jpmomo

Member
Aug 12, 2018
99
31
18
Ah those. I have one coming in since the 8th, but it hasn't arrived yet. Haven't had a chance to test these yet
I have the same es cpu (from the ebay seller in japan) and a sm h12ssw-in. I also have a retail version of the 7452 that works fine in that mb. I tried for a little bit to get the es to post but no luck. there is some new fw from sm that they just released but have not tried that yet as i needed to finish some testing with the retail cpu on the existing bios. I have read through this thread but can't tell what I could try to get the es cpu to boot. Any suggestions at this point?
Thanks,
jp
 

vavavava

New Member
Jan 13, 2020
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0
1
Hello, has anyone had 7702 (2S1404E2VJUG5) working?
2. Will it work with: H11DSi mb?
3. Can one use dual of those processors in H11DSi?
 

EdwardTwiss

New Member
Nov 16, 2016
5
2
3
46
Also interested to know if the ZS1406E2VJUG5 chips will boot in a Supermicro MBD-H11DSI-NT rev 2 board.
Is it possible to run two of these in that board? Taking it a step further even overclocking both chips?
From the looks of previous posts if they can boot then the answer to the two other questions above looks to be yes.

 

Dahuoxia

New Member
Mar 30, 2019
13
0
3
Hi,I noticed both retail and es/qs Rome CPUs use the same microcodes,my friend tested them es ones supported by Asus KRPA-U16 motherboards manufactured before April 2019.I guess it is cpld chip controls what models CPUs supported.
 

ExecutableFix

Active Member
Nov 25, 2019
114
45
28
Hi,I noticed both retail and es/qs Rome CPUs use the same microcodes,my friend tested them es ones supported by Asus KRPA-U16 motherboards manufactured before April 2019.I guess it is cpld chip controls what models CPUs supported.
Which bios is that exactly?
 
Nov 23, 2014
90
29
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Hi,

my Epyc appears to be an engineering/qualification sample:

Code:
Architecture:        x86_64
CPU op-mode(s):      32-bit, 64-bit
Byte Order:          Little Endian
Address sizes:       43 bits physical, 48 bits virtual
CPU(s):              64
On-line CPU(s) list: 0-63
Thread(s) per core:  2
Core(s) per socket:  32
Socket(s):           1
NUMA node(s):        1
Vendor ID:           AuthenticAMD
CPU family:          23
Model:               49
Model name:          AMD Eng Sample: 100-000000054-04_32/24_N
Stepping:            0
CPU MHz:             1700.941
CPU max MHz:         2400.0000
CPU min MHz:         1500.0000
BogoMIPS:            4799.78
Virtualization:      AMD-V
L1d cache:           32K
L1i cache:           32K
L2 cache:            512K
L3 cache:            16384K
NUMA node0 CPU(s):   0-63
Flags:               fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm constant_tsc rep_good nopl nonstop_tsc cpuid extd_apicid aperfmperf pni pclmulqdq monitor ssse3 fma cx16 sse4_1 sse4_2 movbe popcnt aes xsave avx f16c rdrand lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs skinit wdt tce topoext perfctr_core perfctr_nb bpext perfctr_llc mwaitx cpb cat_l3 cdp_l3 hw_pstate sme ssbd mba sev ibrs ibpb stibp vmmcall fsgsbase bmi1 avx2 smep bmi2 cqm rdt_a rdseed adx smap clflushopt clwb sha_ni xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local clzero irperf xsaveerptr wbnoinvd arat npt lbrv svm_lock nrip_save tsc_scale vmcb_clean flushbyasid decodeassists pausefilter pfthreshold avic v_vmsave_vmload vgif umip rdpid overflow_recov succor smca
It's working mostly fine in a Supermicro H11SSL v2.0 board. However, when using SR-IOV, it seems unable to put the virtual functions of a Mellanox NIC in seperate IOMMU groups (as the same setup works flawlessly when swapping in a retail Epyc). Do you guys have any idea if this could be fixed via microcode?
 

Dahuoxia

New Member
Mar 30, 2019
13
0
3
Hi,

my Epyc appears to be an engineering/qualification sample:

Code:
Architecture:        x86_64
CPU op-mode(s):      32-bit, 64-bit
Byte Order:          Little Endian
Address sizes:       43 bits physical, 48 bits virtual
CPU(s):              64
On-line CPU(s) list: 0-63
Thread(s) per core:  2
Core(s) per socket:  32
Socket(s):           1
NUMA node(s):        1
Vendor ID:           AuthenticAMD
CPU family:          23
Model:               49
Model name:          AMD Eng Sample: 100-000000054-04_32/24_N
Stepping:            0
CPU MHz:             1700.941
CPU max MHz:         2400.0000
CPU min MHz:         1500.0000
BogoMIPS:            4799.78
Virtualization:      AMD-V
L1d cache:           32K
L1i cache:           32K
L2 cache:            512K
L3 cache:            16384K
NUMA node0 CPU(s):   0-63
Flags:               fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm constant_tsc rep_good nopl nonstop_tsc cpuid extd_apicid aperfmperf pni pclmulqdq monitor ssse3 fma cx16 sse4_1 sse4_2 movbe popcnt aes xsave avx f16c rdrand lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs skinit wdt tce topoext perfctr_core perfctr_nb bpext perfctr_llc mwaitx cpb cat_l3 cdp_l3 hw_pstate sme ssbd mba sev ibrs ibpb stibp vmmcall fsgsbase bmi1 avx2 smep bmi2 cqm rdt_a rdseed adx smap clflushopt clwb sha_ni xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local clzero irperf xsaveerptr wbnoinvd arat npt lbrv svm_lock nrip_save tsc_scale vmcb_clean flushbyasid decodeassists pausefilter pfthreshold avic v_vmsave_vmload vgif umip rdpid overflow_recov succor smca
It's working mostly fine in a Supermicro H11SSL v2.0 board. However, when using SR-IOV, it seems unable to put the virtual functions of a Mellanox NIC in seperate IOMMU groups (as the same setup works flawlessly when swapping in a retail Epyc). Do you guys have any idea if this could be fixed via microcode?
It seems can't be solved by microcodes,just bugs not fixed in es.
 

yesoos

Member
Mar 10, 2020
33
3
8
PL
Hi, ZS1406E2VJUG5 is working on Asus KRPA-u16 with bios 0302 , I've made BAD decision and flashed 0601 latest bios and now it stucks on D1 POST. I cannot flash older one via iKVM (I found this option hidden so probably there is reason for that). I sent question to Asus support, maybe they will answer :)

 

ExecutableFix

Active Member
Nov 25, 2019
114
45
28
Hi, ZS1406E2VJUG5 is working on Asus KRPA-u16 with bios 0302 , I've made BAD decision and flashed 0601 latest bios and now it stucks on D1 POST. I cannot flash older one via iKVM (I found this option hidden so probably there is reason for that). I sent question to Asus support, maybe they will answer :)

You can add a /bios_update to the end of the url when in maintenance (eg. /#maintenance/bios_update)
 
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