AMD EPYC 7002 Series Rome Delivers a Knockout

Discussion in 'STH Main Site Posts' started by Patrick Kennedy, Aug 7, 2019.

  1. #1
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  2. Hydrogen_Bombaklot

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    Any idea what all-core boost frequencies will be? Those figures are curiously absent today...
     
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  3. zir_blazer

    zir_blazer Active Member

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    I have not seen such complete obliteration since... urgh, never. Price performance and raw performance seems to topple what I recall about 2003 Opteron/Athlon 64 and 2006 Conroe.

    Also, pay A LOT of attention to the EPYC 7252. 16C with all the features of Rome (8 RAM channels, 128 PCIe Lanes) for 650 U$D, less than what the AM4 Ryzen 3950X is expected to cost. What doesn't oonvince me is that it only has 64 MiB Cache L3, the 7282 is also 16C, got 128 MiB but cost 978 U$D. Any idea of how many chiplets and what CCX/Cache L3 configuration they are using?
    Regardless, I think that the 7282, saving for its lowish 2.9-3.2 GHz Frequency, could be a wonderful entry level HEDT Processor for people that wants a Zen 2 TR now, or needs more I/O than TR platform provides.
     
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  4. BackupProphet

    BackupProphet Well-Known Member

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    Wow, really impressive. I do wonder how fast the Clickhouse database will run on 2x Epyc 7742. Crunching 100-200GB of raw numbers per second would be amazing.
     
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  5. Edu

    Edu Member

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    I was quite surprised that there is still latency differences depending on which DIMM is accessed by which core. I would have though that all that since all DIMMs are connected to the same I/O chip they would all be the same latency.
     
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  6. Patrick

    Patrick Administrator
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    They are pretty high. We did not get that information at the launch but the 7742 is 3.2GHz I believe.

    @BackupProphet find me a self-configuring docker container that we can use to benchmark!

    @Edu - latency is a bit different. The massive caches hide the latency in most workloads. Remember, you have more cache per 8 cores than with an Intel Xeon Silver 4210 10-core CPU. Another item is that using fewer sockets/ systems, your application latency is going to be lower. CCD to CCD is much lower latency than going over Ethernet.
     
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    Last edited: Aug 8, 2019
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  7. Aluminum

    Aluminum Active Member

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    This is brutal. I want a TR3 so bad, or 1P Epyc to get desktop workstation boards.

    IIRC, the inside-the-CCX 4 core latency is also lower than intel has ever had.
     
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  8. TXAG26

    TXAG26 Member

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    Have any new motherboards dropped yet that support all of the new Rome features? Supermicro states that their existing H11 boards (version 2.0) support Rome 7002 and DDR4 3200 ram, but not PCIe 4. The current Supermicro H11 boards are well featured and solid, but I would really like to see them refreshed to H12 and upgrade the onboard NICs from dual 1Gbe to dual 10Gbe and PCIe 4 support.
     
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  9. alex_stief

    alex_stief Active Member

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    I'll probably need a new board too. What grinds my gears is availability of DDR4-3200 RDIMM. So far I never saw them listed anywhere. Any idea where to source them?
     
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  10. gigatexal

    gigatexal I'm here to learn

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    Makes me even more bummed I sold my AMD at sub bucks.

    Killer showing from AMD. Glad to see competition is heating up.
     
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  11. Hydrogen_Bombaklot

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    Gigabyte already has some 7002 servers listed, including a hyperconverged 2U4N server.
     
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  12. Cixelyn

    Cixelyn New Member

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    #12
  13. Patrick

    Patrick Administrator
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    We have a photo of a H12 system on the topology page of our review along with a Gigabyte PCIe Gen4 board. HPE and Dell will be a bit slower to market but in a few weeks. Lenovo will be shipping its Gen4 systems by the end of the month.
     
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  14. Patrick

    Patrick Administrator
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    Also, just as a note, Supermicro has a 2U4N single socket per node solution. The first iteration has 4x M.2 22110 NVMe along with 3.5" storage, SIOM networking, and PCIe Gen4 slots. To me that is fascinating.
     
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  15. Edu

    Edu Member

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    #15
  16. alex_stief

    alex_stief Active Member

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    The data of many types of applications does not fit into L3 cache. This does not mean that bigger L3 caches do not help in this scenario. The chance of a piece of data still/already residing in L3 when it is needed generally increases with a larger L3. When this occurs, the data can be fetched from the much faster cache instead of reading it again from memory. But I agree with you to some extent, looking up entries more or less randomly in a large database is not the strong suit of a system with high memory latency.
     
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  17. Patrick

    Patrick Administrator
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    You can certainly create scenarios to target the architecture and make it look OK at best. On the other hand, if you think about virtualized servers, the cache layout makes quite a bit of sense. Most are not going to see 60 core VMs, and if you do, you are on a single socket rather than having to traverse socket-to-socket links.

    If you are using more mainstream CPUs, say dual Silver 4214's per node, the AMD EPYC 7702P allows you to put everything on a single socket, rather than say 3x 2P nodes. Even if CPUs were at an even cost, you are still lower power and lower system cost with EPYC. You are now comparing a single socket latency to three dual-socket server latency.

    The question is pretty complex. When you focus on a part of the solution, you can expose some of Rome's architectural decisions. Still, by the time you are doing even 2:1 socket or node consolidation into 1P Rome, focusing on smaller aspects is less exciting.

    I fully expect Intel will have a set of benchmarks to highlight those workloads soon. The feedback I have been hearing outside of our own testing has been very positive as well.
     
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  18. Evan

    Evan Well-Known Member

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    2 x 64-core would mean for VM usage at least in general mix usage that I see would think that you would probably be putting 2TB ram in a system.

    (Comparison today I do a lot of 2 x 20-core intel scalable with 768gb ram and seems a good ratio for general use)
     
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  19. Edu

    Edu Member

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    Yeah, I wouldn't be surprised if AMD took over the virtualized server market. On top of the performance, there's security. It seems there is a new Intel side-channel vulnerability every month, which doesn't affect AMD.
     
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  20. alex_stief

    alex_stief Active Member

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    That might change once AMD gets a higher market share in servers again. Not saying that their CPUs have just as many vulnerabilities as Intel. But if you were trying to discover CPU vulnerabilities for whatever reason, which architecture would you focus on...the one with over 95% market share in servers or any of the alternatives that up to now, nobody really cared about.
     
    #20
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