Search results

  1. C

    Finally: Overclocking EPYC Rome ES

    Also , you can use my mod version, supports save config: https://github.com/chraac/EPYC-Rome-Overclock
  2. C

    Finally: Overclocking EPYC Rome ES

    Thanks for replying, I not so sure that if my 6800xt is connected to this GPP Bridge, but the error is gone when I force the pcie runs at gen3 in bios. So there maybe some problem with pcie gen4.
  3. C

    Finally: Overclocking EPYC Rome ES

    Hi, got a 7452QS with EPYCD8 and 6800xt, GPUZ shows that PCIE runs at Gen4, but there comes a lot of PCIE error in windows event, so question is if there is anyone use the 7452QS with PCIE Gen4 runs well without pcie error? Thanks
  4. C

    Asrock wont support EPYC Milan on the EPYCD8/EPYCD8-2T

    Just a thought, maybe we could try to cross flash the bios of ROMED8 to EPYCD8, to see if it could boot, with the build-in Dr.Debug, maybe we could figure out how to get milan work on this board.
  5. C

    Finally: Overclocking EPYC Rome ES

    Just curious which website did you see these milan es? taobao?
  6. C

    Finally: Overclocking EPYC Rome ES

    Hi guys, I'm finally running my 7452qs at 3.2ghz 1.1v, just want to know that if this voltage is ok for daily usage and whether the chip will degrade
  7. C

    Finally: Overclocking EPYC Rome ES

    Maybe there are some internally freq throttling, I see the freq is constantly 3.45G@1.05v
  8. C

    Finally: Overclocking EPYC Rome ES

    I have and 32c 57-04 qs, and the VID is 1.26v+ in 3.45G. When I manually set the voltage to 1.05v ,the cinebench r20 score is lower than 1.26v+, even lower than 3.0G.
  9. C

    Finally: Overclocking EPYC Rome ES

    Hi guys, I recently purchase a 7452 QS 57-04 on EPYCD8, 8x16GB 2400. And I found that some temperature in HWInfo64 was ridiculous high: As you can see that "CPU Die (average)" was around 72°C and when I run the Prime95 torture test it'll quick raise up to 100°C (TjMax), but the CCD temp seems...
  10. C

    Can anyone tell me what is EPYC 7D12

    emmmm, maybe you are right, they will check the entire BIOS image to build a trusted root
  11. C

    Can anyone tell me what is EPYC 7D12

    Or maybe we could extract the PSP fw from dell and then plant into our custom bios, but this base on the hypothesis that there is not any bios signed/verify procedure in EPYC boot
  12. C

    Can anyone tell me what is EPYC 7D12

    found an interesting github group: PSPReverse ,which maintain some tools to reverse engineer the AMD PSP firmware
  13. C

    Can anyone tell me what is EPYC 7D12

    See through the article, I figure out that: 1. AMD has implement some mechanism that allow server vendor like DELL to install a public key into PSB (Platform Secure Boot), and then the system will only boot with the firmware signed with corresponding private key. 2. PSB (Platform Secure Boot) is...
  14. C

    Can anyone tell me what is EPYC 7D12

    Can you paste the original post here, I just wandering if there is a way to disable some cpu pins to bypass those fuses.
  15. C

    Overclock your AMD Epyc

    I have an EPYC 7351P retail version and with this tool I can overclock to 3.4ghz. The stock freq is 2.4ghz, so...
  16. C

    Can anyone tell me what is EPYC 7D12

    But maybe we can try to overclock it?
  17. C

    Can anyone tell me what is EPYC 7D12

    It seems that some SuperMicro mobo with special version of BIOS can boot this CPU and enter Windows
  18. C

    Can anyone tell me what is EPYC 7D12

    It there any mobo can support this CPU?
  19. C

    EU Dual E5-2600 Foxconn Server £250

    I was able to get remote video work but keyboard and mouse still malfunction, and here is my fw: link: https://pan.baidu.com/s/1KNM20SxmzzSY6A1sG0XrgQ pass: 4a5c
  20. C

    EU Dual E5-2600 Foxconn Server £250

    Sorry for mistake in prev post, original SetVKVMStatus has two branch which set "oem_int_vkvm_status" to 0 or 1 via aim_config_set_int, so we must make sure this function will not set "oem_int_vkvm_status" to 0 in any condition, which is change 0x0000E0CC to "MOV R1, 1". and changed CMP R3, 1 to...