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    IvyBridge Xeon E5-2697v2 experiences

    the core id argument to taskset could depend on the cores detected by the system, for instance via /sys/devices/system/cpu/online if it'd be easiest to just run it over all cores detected, the '-t' argument to lat_mem_rd could be lowered to 256 to reduce the runtime Thanks for including it
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    IvyBridge Xeon E5-2697v2 experiences

    Below is (don't know how to attach) a script that'll output the results of lat_mem_rd into ./lmbench-3.0-a9/lat_mem_rd_core.txt It works on my i7-4800MQ laptop with fedora 19 and gcc 4.8.1, but the I'm not sure what the core #'s will be on the 2697 system (especially with HT on). If interested...
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    IvyBridge Xeon E5-2697v2 experiences

    I'd love to see some cache latency benchmarks on these Ivy-Bridge-EP chips (esp. on the 10 and 12 core dies) so we can understand the ring bus structure better. For example, if you have the time, LMBENCH is a good test: lmbench | Free System Administration software downloads at SourceForge.net...