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That card should work well. Speeds will exceed your expectations. Thermals will most likely depend on what M.2s you use (& how hard they're used). The fan and baffle will/should direct airflow over the switch chip & SSDs (and out the vented bracket). Please report back.

a.k.a. kluge (keep the hacker tradition alive! [see 4th paragraph])

(maybe,) ionice

You want this thread: [Link] and (I'm pretty sure) the STH'er you want to scan for (and thank) is @napalm_atx .

See this post [Link] for a link to the manufacturer's page (vs reseller). Also, remainder of that thread might have more details, and STH'ers using the card.

No problemo! Power (from the cable's Sata_15pin pigtail) is going where the OWC_Shuttle expects it. If SAS signals go where PCIe signals are expected, "it just won't answer the phone". @mattventura: OR ... Maybe not! :cool: Here's the cable you want. [Link] (At that price, get two! [surplus U.2...

Good point. And, if/when it's time to seriously kick butt, you can add an M3008. And, further on, when 10GbE is slow, you can remove the QUAD, and replace it with a 40Gb (or 100Gb) @x8 (slot6), and, when ZFS has evolved into fully-integrated multi-tiered storage, a 4x U.2 (on real PCIe_switch)...

Seeing the option in the BIOS is maybe a good sign. (the screenshot that @RolloZ170 posted for the actual BIOS you linked IS very likely what you will see when you actually enter the BIOS on boot). But that is not a guarantee that it will actually be implemented in the real BIOS code and/or at...

The tri-mode hba's have performance and connectivity compromises for NVMe use (price of flexibility--TANSTAAFL). I'd suggest the LSI P411w-32p; but not cheap either. If you want inexpensive, look for a Ceacent ANU28PE16.

Here's one, from just next-door (DE). [Link] (If right-angle can work) If not, just search on ebay.com for SFF-8643 30cm I saw a few from CN

Intel DC-P5510 (SSDPF2KX038TZ): dlfeat : 25 [4:4] : 0x1 Guard Field of Deallocated Logical Blocks is set to CRC of The Value Read [3:3] : 0x1 Deallocate Bit in the Write Zeroes Command is Supported [2:0] : 0x1 Bytes Read From a Deallocated Logical Block and its Metadata are 0x00...

Maybe you're referring to the AM5 platform ... does it actually allow for x8, via HSIO? On the Intel [WZ][67]xx, it's because the chipset itself, by design, ONLY allows for (soft-strapping of its PCIe lanes to) x1, x2, or x4. There was one Intel chipset, early PCIe3 days, that did allow for...

Yes, definitely a scenario where a namespace is the right approach (vs cramping your style via partitioning). I'm curious, couldn't you. on occasion (in a pinch) set up the 0.6T balance in a second NS, but always do a virginize (and NS2 delete) after? @triples, thanks again for posting that...

[Somewhat off-the-wall, but] External SAS (ie, 8088<=>8088) can go 10 meters. I'm considering this for a (mostly cold) shelf in the basement. SAS2 single-linked gets you 2x 10Gbe.

Thanks for the confirmation; I guess this card IS "under-designed" ... But after a bit of research, I do not fault, or criticize, the card. I feel that the PM983a (and possibly the PM983) is uniquely voracious in sucking power. The 1.92 & 3.84 are spec'd for 8.7w/10.6w (r/w). I could not find...

But your statement is an oversimplification :)... yes, the actual data lanes are just traces, but the power (and ReferenceClock) are NOT. A PCIe x16 slot is spec'd for 75w (total), BUT only 10w of that is @3.3v which is clearly insufficient for (almost) any 4 M.2 NVMe sticks. Therefore, all of...

I suspect your card is not supplying sufficient amps (@3.3v) for 4 of those hungry M.2s.

That shouldn't be a limitation -- since PCIe is full duplex. PCIe gen3 x4 will do 3.2-3.6 GB/sec in each direction, concurrent. (And I suspect the ConnectX-3 has the muscle also. The CPU ???)

Probably because the bridge chip does not implement PCIe hot-swap/plug--very reasonable. [But that IS a quick re-boot.]

Also means that 22110 is a NON-issue.