Intel Alder Lake-S Home Server Plans?

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rootshell

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Jan 10, 2021
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Curious if anyone is closely watching the upcoming Intel 12th Gen Core Alder Lake-S release and maybe planning a home server build based on it.
Has anyone seen any z690 motherboards with IPMI?
Looks like K SKUs only at first, so curious which model people are thinking would be best for a lower power server.
 

BlueFox

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Z-series Intel chipsets are generally not going to have IPMI added by any vendor. Overclocking capability and IPMI normally don't go together. Closest you'll get on a consumer motherboard is Intel AMT on the W-series chipsets.
 

rootshell

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Yea, I get it, but I think we'll also need to see what happens.

DDR5 has ECC.
big.LITTLE should bring a good combo of low idle power + horse power on demand when needed.
iGPU is attractive to those of us running Plex, Blue Iris, or other GPU-dependent workload. No AIC needed.

Z chipset probably isn't ideal - i agree, but will be the first/only offering until 2022. Really hoping SM or Asrock Rack does a MB w/ remote mgmt of some type.
 

Stephan

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I am watching the space. You will want Intel W680 and W685 (enthusiast) chipset boards for Alder Lake Xeon. Supply might be a year out though, or more, depending on post C supply chain ramifications.

If you need something urgent, a E-22xx Xeon on C246 might be a good stopgap. Stuff is sold off and getting rarer though and 400 fiat for a 6C/12T E-22xx also feels a little off. Boards with IPMI also almost as much in price. Second hand pretty much dry, might need to scout the entry workstation segment of Lenovo or HP for a machine with those specs.
 

111alan

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Mar 11, 2019
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As long as AMD has comparable segment solutions that support ECC memory that would be my choice.
I don't think that is something that needs that much attention. Both google and facebook is reporting FP unit hard faults on AMD cpus(originally it says CPUs with newer cmos process and architecture, but at the time of the report zen2 and zen3 are the only thing which uses new lithography). It will only get more serious in the far more aggressively clocked desktop CPUs, which was known to have high BSOD rate at stock(meaning some of them generates so much faults that the OS can't handle).

So in that case I don't think ECC could do that much. The CPU itself is reported to generate computational errors anyway, along with desktop SSD with low quality flash chips on aggressive clocks, and more. If you want stability, I think it's best to avoid desktop components alltogether, or go for older things manufactured at the time when hard faults isn't an issue.
 

Wasmachineman_NL

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Aug 7, 2019
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Yea, I get it, but I think we'll also need to see what happens.

DDR5 has ECC.
big.LITTLE should bring a good combo of low idle power + horse power on demand when needed.
iGPU is attractive to those of us running Plex, Blue Iris, or other GPU-dependent workload. No AIC needed.

Z chipset probably isn't ideal - i agree, but will be the first/only offering until 2022. Really hoping SM or Asrock Rack does a MB w/ remote mgmt of some type.
DDR5 does not have true ECC, only on-die ECC.
 

zir_blazer

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Dec 5, 2016
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Remember that Intel treats differently the consumer line (Core iWhatever) and the low end Server/Workstation line (The former Xeon E3 line). It could take a while before you actually see Alder Lake based Xeons E, so it is hard to speculate on that. The relatively recent Xeons E2200 and E2300 launches took several months after their consumer counterparts were released if I recall correctly.
And contrary to what happens in AMD, I think I have never, ever seen a BMC/IPMI on any of the Intel consumer platforms since Intel has a proper server platform based on that same silicon. On AMD you had AsRock Rack doing weird stuff like BMC with consumer X470 Chipset and somewhat unofficial ECC support because there isn't any proper Ryzen PRO platform squarely aimed to the Xeons E3. So forget having Z690 with BMC.
 

mgutt

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Apr 19, 2020
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I hope somebody will release an energy-efficient W680/W685 ITX Workstation board without IPMI. The last efficient was the Gigabyte C246N-WU2 and it was sold out every 2-3 weeks. There was no W480 or W580 or C256 ITX board without IPMI.

By the way, will PCIe 5.0 raise power consumption? What if only PCIe 3.0 components are used?
 
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RolloZ170

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By the way, will PCIe 5.0 raise power consumption? What if only PCIe 3.0 components are used?
every gen. the peak2peak voltage was halved so the time to rise/fall is lowered. with PCIE4 some new energy saving thing was implemented(stop clocking etc). i don't know if PCIE3 is supported with PCIE5 systems. If re-drivers/switches are used they have to auto-switch modes, makes that not cheaper at all. the PCIE data transfer itself is not the reason for power consumption rising if any,, the data must be loaded and stored somewhere.
 

mgutt

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every gen. the peak2peak voltage was halved so the time to rise/fall is lowered. with PCIE4 some new energy saving thing was implemented(stop clocking etc).
But why aren't there any as or more efficient setups? Using PCIe 4.0 components on a X570 setup raises the power consumption and doesn't lower it.

And this isn't something which becomes even by stopping all other components earlier as your file transfer of a PCIe 4.0 NVMe has done it's job faster. In the real world of a desktop PC or Home Server, your NVMe never stops working as you have permanently tiny accesses to it. And the same is valid for the GPU. You can't "stop clocking" while displaying something on your display. The lanes stay active.

PS There is an interesting list of measurements and it does not contain any recent ITX/mATX/ATX builds in the top. I contributed multiple measurements by myself and it was really hard to find an efficient B550 AMD motherboard.

i don't know if PCIE3 is supported with PCIE5 systems
All gens are upwards and backwards compatible. Or did something change with PCIe 5.0?
 

RolloZ170

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But why aren't there any as or more efficient setups? Using PCIe 4.0 components on a X570 setup raises the power consumption and doesn't lower it.
X570 is a bad example, the IF is clocked high and draws power regardless if PCIE4 used or not.
with higher PCIE speed all data transfer Hubs can deliver more data per time, and that draws power, not the PCIE lanes.
All gens are upwards and backwards compatible. Or did something change with PCIe 5.0?
in theory only. as i wrote the re-driver/switches can build issues.
a PCIE5 receiver will accept PCIE3 bare signals, but i doubt a PCIE3 receiver accepts low peak2peak PCIE5 signals.
to implement a full downwards compatibility of PCIE5 is very expensive, i bet not all would do that.
 

Evan

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Jan 6, 2016
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So I never get any info on the low end CPU’s, what will Adler lake equivalent Xeon’s look like. Also big and small cores like the desktop CPU’s or just the big cores ?
 

mgutt

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with higher PCIE speed all data transfer Hubs can deliver more data per time, and that draws power, not the PCIE lanes.
Again a real world example. The 980 pro consumes more power in idle if PCIe 4.0 is used:

And note: Anandtech measures the nvme alone. There is even an PCIe 4.0 overhead from the cpu/chipset which is not part of the measurement.

Conclusion: The same amount of lanes consumes less energy if PCIe 3.0 is used, no matter if data is transferred or not.

And if the X570 is a bad example, which is a good one? I don't know any setup which has an as low power consumption (or even less) than an old C236 or C246 motherboard. And C236 is really old (6th gen). I miss the promised technical progress in efficiency. It seems it's only better on high loads, but this won't help me with my handful docker containers and 1 or 2 VMs doing really nothing in idle.
 

NateS

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in theory only. as i wrote the re-driver/switches can build issues.
a PCIE5 receiver will accept PCIE3 bare signals, but i doubt a PCIE3 receiver accepts low peak2peak PCIE5 signals.
to implement a full downwards compatibility of PCIE5 is very expensive, i bet not all would do that.
They actually are all downwards compatible to PCIe 1.0, even the switches and retimers. They have to be: on poweron, the link starts out as a PCIe 1.0 link to ensure good signal integrity. Then the devices calibrate the electrical parameters of the physical interface (drive strength, equalization settings, etc.), to ensure signal integrity on a high speed link. And only then is the link speed changed to the higher speed. There's no need for a PCIe3 port to accept low peak2peak PCIe5 signals, because when in the initial PCIe1 link negotiation phase, it will see that the other device is not compatible, and will only increase the speed to PCIe3 speeds.
 

RolloZ170

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re-driver, not re-timer.
re-driver and switches are not part of PCIE4/PCIE5 specs.

we will see if it works in practice.
 

NateS

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re-driver, not re-timer.
re-driver and switches are not part of PCIE4/PCIE5 specs.

we will see if it works in practice.
If a redriver is used, it also needs to support the slower speeds, regardless of if it's part of the spec, or things won't work at all. There's no way for a device to get PCIe4/5 speeds without first linking up at PCIe1 speeds and then requesting a speed increase. If in practice it does not support the slower speeds, it won't work at the faster speeds either.
 

RolloZ170

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f a redriver is used, it also needs to support the slower speeds, regardless of if it's part of the spec, or things won't work at all.
not the speed, the signal voltage peak2peak is the problem.