Epyc Rome 7002 series, performance impact

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EffrafaxOfWug

Radioactive Member
Feb 12, 2015
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511
113
I don't know much about lightwave myself, but from looking at a couple of benchmarks I found (albeit of relatively old versions) it doesn't seem to be constrained by memory bandwidth:

Most rendering and encoding tasks usually only show single-digit percentage gains going from slow to fast memory since the constraint is almost always on the CPU side of things rather than feeding data in to the CPU (the dataset that needs to be fed in to the CPU at any one time tends to be relatively small).
 

ari2asem

Active Member
Dec 26, 2018
745
128
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The Netherlands, Groningen
are you talking about this product ??


if yes, then i am willing to run some test/benchmarks for you if you provide me help how to run the test/benchmark.

my system:
dual 7742
16 dimms of 32gb at 3200mhz speed (8 dimms per cpu)
 

111alan

Active Member
Mar 11, 2019
290
107
43
Haerbing Institution of Technology
On Skylake-SP platform most larger scenes already have more than 10% memory bound, this number will increase a lot more on EPYC2, since the CPU-to-memory ratio is a lot larger(6ch for 28c to 8ch for 64c). Or to put it simple, EPYC2 is far more thirst of memory performance than anything else. So in most rendering scenario I tested it's very important to populate as much memory channel as possible.

Besides, some EPYC motherboards may experience issues if you only have 4 channels populated, like having even worse memory bandwidth than it should be(tested with AIDA64).

Just remember, unlike 10 years ago, CPU performance has increased by more than 50 times, more than 100 times if you consider SIMD, but memory performance hasn't improved nearly as much. Sandy-bridge tests, even Skylake-sp tests aren't going to tell too much about the situation.
 
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