AMD EPYC Infinity Fabric Update and MCM Cost Savings

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cactus

Moderator
Jan 25, 2011
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Interesting! The unused IF transceiver seems odd. Also, are these dies different than the Ryzen R* or are there disabled IF and PCIe transceivers on those? Both Intel and AMD seem to be pin limited even with these huge, pin dense sockets. With memory channels turning into storage with NVDIMM, lack of huge per pin DRAM speed increases, and more demand for peripheral I/O channels, I wonder if we will get a move back to northbridges that act as a memory and PCIe switch. The E7 line used to have serial ram buffers, yeah?