Intel Demonstrating Broadwell-EP with FPGA On-package at SC16

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Patrick Kennedy

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mtekk

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May 22, 2015
21
5
3
Minnesota
Super cool. Surprised they didn't show up on the Xeon Phi board first.
I assume it is a die size thing. They only have so much space on a package and the Xeon Phi die are quite large. A Xeon E5 should be smaller than an Xeon Phi die leaving more room to fit an Arria 10 die on package.