Dell C6100 and ConnectX-2 Mezzanine card runnin at pci-e x4 not x8

[MiniKnight]

Are you thinking 5500 versus 5520 is the reason these are showing up as x4?

 

[lmk]

Intel 5520 chipset -- 36 Lanes pci-express
Intel 5500 chipset -- 24 Lenes pci-express

Here's an Intel document supporting that information, for anyone who wants to read up on it. Regarding the number of lanes in particular, go to page 32 (table 1 -1). There is a lot of other useful information and diagrams.

http://www.intel.com/content/dam/doc/datasheet/5520-5500-chipset-ioh-datasheet.pdf

 

[lmk]

If so, also is the C6100 the 24-bay or 12-bay version? And does it have the Mezzanine cut-out slot or did it have to be modified?

^^^ Anyone?

And Quad-core or Hex-core?

 

[zoroyoshi]

Here's an Intel document supporting that information, for anyone who wants to read up on it. Regarding the number of lanes in particular, go to page 32 (table 1 -1). There is a lot of other useful information and diagrams.

http://www.intel.com/content/dam/doc/datasheet/5520-5500-chipset-ioh-datasheet.pdf

This document says that IOH ESI port has different device id (page 255).
8086:3403 = Intel 5500 chipset
8086:3406 = Intel 5520 chipset
(on windows, check device manager -> Intel 5520/5500/X58 I/O hub to ESI port -> hardware ID)

 

[Chuntzu]

I confirmed with aida 64 that my mezzanine is running x4. I am doing a swap of a board from one of my 24 drive nodes to one of the 12 drive nodes to see if that fixes it. While doing that I will look closely at the boards to see if the writing is there. Also I need to check into the 5500v5520 chip set issue. Good catch on that. I am running e5530s and l5520s in all my nodes.

 

[c6100]

Were you ever able to get closer to 10 gbps?